Move Arg::Type and Arg::Width out into the B3 namespace, since they are general concepts
https://bugs.webkit.org/show_bug.cgi?id=168833
Reviewed by Saam Barati.
I want to use the Air::Arg::Type and Air::Arg::Width concepts in B3. We are already
doing this a bit, and it's akward because of the namespacing. Throughout B3 we take the
approach that if something is not specific to Air, then it should be in the B3
namespace.
This moves Air::Arg::Type to B3::Bank. This moves Air::Arg::Width to B3::Width.
I renamed Arg::Type to Bank because there is already a B3::Type and because Arg::Type
was never really a type. Its purpose was always to identify register banks, and we use
this enum when the thing we care about is whether the value is most appropriate for
GPRs or FPRs.
I kept both as non-enum classes because I think that we've learned that terse compiler
code is a good thing. I don't want to say Bank::GP when I can say GP. With Width, the
argument is even stronger, since you cannot say Width::8 but you can say Width8.
* CMakeLists.txt:
* JavaScriptCore.xcodeproj/project.pbxproj:
* b3/B3Bank.cpp: Added.
(WTF::printInternal):
* b3/B3Bank.h: Added.
(JSC::B3::forEachBank):
(JSC::B3::bankForType):
* b3/B3CheckSpecial.cpp:
(JSC::B3::CheckSpecial::forEachArg):
* b3/B3LegalizeMemoryOffsets.cpp:
* b3/B3LowerToAir.cpp:
(JSC::B3::Air::LowerToAir::run):
(JSC::B3::Air::LowerToAir::tmp):
(JSC::B3::Air::LowerToAir::scaleForShl):
(JSC::B3::Air::LowerToAir::effectiveAddr):
(JSC::B3::Air::LowerToAir::addr):
(JSC::B3::Air::LowerToAir::createGenericCompare):
(JSC::B3::Air::LowerToAir::createBranch):
(JSC::B3::Air::LowerToAir::createCompare):
(JSC::B3::Air::LowerToAir::createSelect):
(JSC::B3::Air::LowerToAir::lower):
* b3/B3MemoryValue.cpp:
(JSC::B3::MemoryValue::accessWidth):
* b3/B3MemoryValue.h:
* b3/B3MoveConstants.cpp:
* b3/B3PatchpointSpecial.cpp:
(JSC::B3::PatchpointSpecial::forEachArg):
* b3/B3StackmapSpecial.cpp:
(JSC::B3::StackmapSpecial::forEachArgImpl):
* b3/B3Value.h:
* b3/B3Variable.h:
(JSC::B3::Variable::width):
(JSC::B3::Variable::bank):
* b3/B3WasmAddressValue.h:
* b3/B3Width.cpp: Added.
(WTF::printInternal):
* b3/B3Width.h: Added.
(JSC::B3::pointerWidth):
(JSC::B3::widthForType):
(JSC::B3::conservativeWidth):
(JSC::B3::minimumWidth):
(JSC::B3::bytes):
(JSC::B3::widthForBytes):
* b3/air/AirAllocateRegistersByGraphColoring.cpp:
* b3/air/AirAllocateStack.cpp:
(JSC::B3::Air::allocateStack):
* b3/air/AirArg.cpp:
(JSC::B3::Air::Arg::canRepresent):
(JSC::B3::Air::Arg::isCompatibleBank):
(JSC::B3::Air::Arg::isCompatibleType): Deleted.
* b3/air/AirArg.h:
(JSC::B3::Air::Arg::hasBank):
(JSC::B3::Air::Arg::bank):
(JSC::B3::Air::Arg::isBank):
(JSC::B3::Air::Arg::forEachTmp):
(JSC::B3::Air::Arg::forEachType): Deleted.
(JSC::B3::Air::Arg::pointerWidth): Deleted.
(JSC::B3::Air::Arg::typeForB3Type): Deleted.
(JSC::B3::Air::Arg::widthForB3Type): Deleted.
(JSC::B3::Air::Arg::conservativeWidth): Deleted.
(JSC::B3::Air::Arg::minimumWidth): Deleted.
(JSC::B3::Air::Arg::bytes): Deleted.
(JSC::B3::Air::Arg::widthForBytes): Deleted.
(JSC::B3::Air::Arg::hasType): Deleted.
(JSC::B3::Air::Arg::type): Deleted.
(JSC::B3::Air::Arg::isType): Deleted.
* b3/air/AirArgInlines.h:
(JSC::B3::Air::ArgThingHelper<Tmp>::forEach):
(JSC::B3::Air::ArgThingHelper<Arg>::forEach):
(JSC::B3::Air::ArgThingHelper<Reg>::forEach):
(JSC::B3::Air::Arg::forEach):
* b3/air/AirCCallSpecial.cpp:
(JSC::B3::Air::CCallSpecial::forEachArg):
* b3/air/AirCCallingConvention.cpp:
* b3/air/AirCode.cpp:
(JSC::B3::Air::Code::Code):
(JSC::B3::Air::Code::setRegsInPriorityOrder):
(JSC::B3::Air::Code::pinRegister):
* b3/air/AirCode.h:
(JSC::B3::Air::Code::regsInPriorityOrder):
(JSC::B3::Air::Code::newTmp):
(JSC::B3::Air::Code::numTmps):
(JSC::B3::Air::Code::regsInPriorityOrderImpl):
* b3/air/AirCustom.cpp:
(JSC::B3::Air::PatchCustom::isValidForm):
(JSC::B3::Air::ShuffleCustom::isValidForm):
* b3/air/AirCustom.h:
(JSC::B3::Air::PatchCustom::forEachArg):
(JSC::B3::Air::CCallCustom::forEachArg):
(JSC::B3::Air::ColdCCallCustom::forEachArg):
(JSC::B3::Air::ShuffleCustom::forEachArg):
(JSC::B3::Air::WasmBoundsCheckCustom::forEachArg):
* b3/air/AirDumpAsJS.cpp:
(JSC::B3::Air::dumpAsJS):
* b3/air/AirEliminateDeadCode.cpp:
(JSC::B3::Air::eliminateDeadCode):
* b3/air/AirEmitShuffle.cpp:
(JSC::B3::Air::emitShuffle):
* b3/air/AirEmitShuffle.h:
(JSC::B3::Air::ShufflePair::ShufflePair):
(JSC::B3::Air::ShufflePair::width):
* b3/air/AirFixObviousSpills.cpp:
* b3/air/AirFixPartialRegisterStalls.cpp:
(JSC::B3::Air::fixPartialRegisterStalls):
* b3/air/AirInst.cpp:
(JSC::B3::Air::Inst::hasArgEffects):
* b3/air/AirInst.h:
(JSC::B3::Air::Inst::forEachTmp):
* b3/air/AirInstInlines.h:
(JSC::B3::Air::Inst::forEach):
(JSC::B3::Air::Inst::forEachDef):
(JSC::B3::Air::Inst::forEachDefWithExtraClobberedRegs):
* b3/air/AirLiveness.h:
(JSC::B3::Air::TmpLivenessAdapter::numIndices):
(JSC::B3::Air::TmpLivenessAdapter::acceptsBank):
(JSC::B3::Air::TmpLivenessAdapter::valueToIndex):
(JSC::B3::Air::TmpLivenessAdapter::indexToValue):
(JSC::B3::Air::StackSlotLivenessAdapter::acceptsBank):
(JSC::B3::Air::RegLivenessAdapter::acceptsBank):
(JSC::B3::Air::AbstractLiveness::AbstractLiveness):
(JSC::B3::Air::AbstractLiveness::LocalCalc::execute):
(JSC::B3::Air::TmpLivenessAdapter::acceptsType): Deleted.
(JSC::B3::Air::StackSlotLivenessAdapter::acceptsType): Deleted.
(JSC::B3::Air::RegLivenessAdapter::acceptsType): Deleted.
* b3/air/AirLogRegisterPressure.cpp:
(JSC::B3::Air::logRegisterPressure):
* b3/air/AirLowerAfterRegAlloc.cpp:
(JSC::B3::Air::lowerAfterRegAlloc):
* b3/air/AirLowerMacros.cpp:
(JSC::B3::Air::lowerMacros):
* b3/air/AirPadInterference.cpp:
(JSC::B3::Air::padInterference):
* b3/air/AirReportUsedRegisters.cpp:
(JSC::B3::Air::reportUsedRegisters):
* b3/air/AirSpillEverything.cpp:
(JSC::B3::Air::spillEverything):
* b3/air/AirTmpInlines.h:
(JSC::B3::Air::AbsoluteTmpMapper<Arg::GP>::absoluteIndex): Deleted.
(JSC::B3::Air::AbsoluteTmpMapper<Arg::GP>::lastMachineRegisterIndex): Deleted.
(JSC::B3::Air::AbsoluteTmpMapper<Arg::GP>::tmpFromAbsoluteIndex): Deleted.
(JSC::B3::Air::AbsoluteTmpMapper<Arg::FP>::absoluteIndex): Deleted.
(JSC::B3::Air::AbsoluteTmpMapper<Arg::FP>::lastMachineRegisterIndex): Deleted.
(JSC::B3::Air::AbsoluteTmpMapper<Arg::FP>::tmpFromAbsoluteIndex): Deleted.
* b3/air/AirTmpWidth.cpp:
(JSC::B3::Air::TmpWidth::recompute):
* b3/air/AirTmpWidth.h:
(JSC::B3::Air::TmpWidth::width):
(JSC::B3::Air::TmpWidth::requiredWidth):
(JSC::B3::Air::TmpWidth::defWidth):
(JSC::B3::Air::TmpWidth::useWidth):
(JSC::B3::Air::TmpWidth::Widths::Widths):
* b3/air/AirUseCounts.h:
(JSC::B3::Air::UseCounts::UseCounts):
* b3/air/AirValidate.cpp:
* b3/air/opcode_generator.rb:
* b3/air/testair.cpp:
(JSC::B3::Air::compile): Deleted.
(JSC::B3::Air::invoke): Deleted.
(JSC::B3::Air::compileAndRun): Deleted.
(JSC::B3::Air::testSimple): Deleted.
(JSC::B3::Air::loadConstantImpl): Deleted.
(JSC::B3::Air::loadConstant): Deleted.
(JSC::B3::Air::loadDoubleConstant): Deleted.
(JSC::B3::Air::testShuffleSimpleSwap): Deleted.
(JSC::B3::Air::testShuffleSimpleShift): Deleted.
(JSC::B3::Air::testShuffleLongShift): Deleted.
(JSC::B3::Air::testShuffleLongShiftBackwards): Deleted.
(JSC::B3::Air::testShuffleSimpleRotate): Deleted.
(JSC::B3::Air::testShuffleSimpleBroadcast): Deleted.
(JSC::B3::Air::testShuffleBroadcastAllRegs): Deleted.
(JSC::B3::Air::testShuffleTreeShift): Deleted.
(JSC::B3::Air::testShuffleTreeShiftBackward): Deleted.
(JSC::B3::Air::testShuffleTreeShiftOtherBackward): Deleted.
(JSC::B3::Air::testShuffleMultipleShifts): Deleted.
(JSC::B3::Air::testShuffleRotateWithFringe): Deleted.
(JSC::B3::Air::testShuffleRotateWithFringeInWeirdOrder): Deleted.
(JSC::B3::Air::testShuffleRotateWithLongFringe): Deleted.
(JSC::B3::Air::testShuffleMultipleRotates): Deleted.
(JSC::B3::Air::testShuffleShiftAndRotate): Deleted.
(JSC::B3::Air::testShuffleShiftAllRegs): Deleted.
(JSC::B3::Air::testShuffleRotateAllRegs): Deleted.
(JSC::B3::Air::testShuffleSimpleSwap64): Deleted.
(JSC::B3::Air::testShuffleSimpleShift64): Deleted.
(JSC::B3::Air::testShuffleSwapMixedWidth): Deleted.
(JSC::B3::Air::testShuffleShiftMixedWidth): Deleted.
(JSC::B3::Air::testShuffleShiftMemory): Deleted.
(JSC::B3::Air::testShuffleShiftMemoryLong): Deleted.
(JSC::B3::Air::testShuffleShiftMemoryAllRegs): Deleted.
(JSC::B3::Air::testShuffleShiftMemoryAllRegs64): Deleted.
(JSC::B3::Air::combineHiLo): Deleted.
(JSC::B3::Air::testShuffleShiftMemoryAllRegsMixedWidth): Deleted.
(JSC::B3::Air::testShuffleRotateMemory): Deleted.
(JSC::B3::Air::testShuffleRotateMemory64): Deleted.
(JSC::B3::Air::testShuffleRotateMemoryMixedWidth): Deleted.
(JSC::B3::Air::testShuffleRotateMemoryAllRegs64): Deleted.
(JSC::B3::Air::testShuffleRotateMemoryAllRegsMixedWidth): Deleted.
(JSC::B3::Air::testShuffleSwapDouble): Deleted.
(JSC::B3::Air::testShuffleShiftDouble): Deleted.
(JSC::B3::Air::testX86VMULSD): Deleted.
(JSC::B3::Air::testX86VMULSDDestRex): Deleted.
(JSC::B3::Air::testX86VMULSDOp1DestRex): Deleted.
(JSC::B3::Air::testX86VMULSDOp2DestRex): Deleted.
(JSC::B3::Air::testX86VMULSDOpsDestRex): Deleted.
(JSC::B3::Air::testX86VMULSDAddr): Deleted.
(JSC::B3::Air::testX86VMULSDAddrOpRexAddr): Deleted.
(JSC::B3::Air::testX86VMULSDDestRexAddr): Deleted.
(JSC::B3::Air::testX86VMULSDRegOpDestRexAddr): Deleted.
(JSC::B3::Air::testX86VMULSDAddrOpDestRexAddr): Deleted.
(JSC::B3::Air::testX86VMULSDBaseNeedsRex): Deleted.
(JSC::B3::Air::testX86VMULSDIndexNeedsRex): Deleted.
(JSC::B3::Air::testX86VMULSDBaseIndexNeedRex): Deleted.
(JSC::B3::Air::run): Deleted.
git-svn-id: http://svn.webkit.org/repository/webkit/trunk@212970 268f45cc-cd09-0410-ab3c-d52691b4dbfc
diff --git a/Source/JavaScriptCore/CMakeLists.txt b/Source/JavaScriptCore/CMakeLists.txt
index 752c6b3..3944998 100644
--- a/Source/JavaScriptCore/CMakeLists.txt
+++ b/Source/JavaScriptCore/CMakeLists.txt
@@ -110,6 +110,7 @@
b3/air/AirValidate.cpp
b3/B3ArgumentRegValue.cpp
+ b3/B3Bank.cpp
b3/B3BasicBlock.cpp
b3/B3BlockInsertionSet.cpp
b3/B3BreakCriticalEdges.cpp
@@ -178,6 +179,7 @@
b3/B3VariableValue.cpp
b3/B3WasmAddressValue.cpp
b3/B3WasmBoundsCheckValue.cpp
+ b3/B3Width.cpp
bindings/ScriptFunctionCall.cpp
bindings/ScriptObject.cpp
diff --git a/Source/JavaScriptCore/ChangeLog b/Source/JavaScriptCore/ChangeLog
index 881ead3..fe3bc12 100644
--- a/Source/JavaScriptCore/ChangeLog
+++ b/Source/JavaScriptCore/ChangeLog
@@ -1,3 +1,239 @@
+2017-02-24 Filip Pizlo <fpizlo@apple.com>
+
+ Move Arg::Type and Arg::Width out into the B3 namespace, since they are general concepts
+ https://bugs.webkit.org/show_bug.cgi?id=168833
+
+ Reviewed by Saam Barati.
+
+ I want to use the Air::Arg::Type and Air::Arg::Width concepts in B3. We are already
+ doing this a bit, and it's akward because of the namespacing. Throughout B3 we take the
+ approach that if something is not specific to Air, then it should be in the B3
+ namespace.
+
+ This moves Air::Arg::Type to B3::Bank. This moves Air::Arg::Width to B3::Width.
+
+ I renamed Arg::Type to Bank because there is already a B3::Type and because Arg::Type
+ was never really a type. Its purpose was always to identify register banks, and we use
+ this enum when the thing we care about is whether the value is most appropriate for
+ GPRs or FPRs.
+
+ I kept both as non-enum classes because I think that we've learned that terse compiler
+ code is a good thing. I don't want to say Bank::GP when I can say GP. With Width, the
+ argument is even stronger, since you cannot say Width::8 but you can say Width8.
+
+ * CMakeLists.txt:
+ * JavaScriptCore.xcodeproj/project.pbxproj:
+ * b3/B3Bank.cpp: Added.
+ (WTF::printInternal):
+ * b3/B3Bank.h: Added.
+ (JSC::B3::forEachBank):
+ (JSC::B3::bankForType):
+ * b3/B3CheckSpecial.cpp:
+ (JSC::B3::CheckSpecial::forEachArg):
+ * b3/B3LegalizeMemoryOffsets.cpp:
+ * b3/B3LowerToAir.cpp:
+ (JSC::B3::Air::LowerToAir::run):
+ (JSC::B3::Air::LowerToAir::tmp):
+ (JSC::B3::Air::LowerToAir::scaleForShl):
+ (JSC::B3::Air::LowerToAir::effectiveAddr):
+ (JSC::B3::Air::LowerToAir::addr):
+ (JSC::B3::Air::LowerToAir::createGenericCompare):
+ (JSC::B3::Air::LowerToAir::createBranch):
+ (JSC::B3::Air::LowerToAir::createCompare):
+ (JSC::B3::Air::LowerToAir::createSelect):
+ (JSC::B3::Air::LowerToAir::lower):
+ * b3/B3MemoryValue.cpp:
+ (JSC::B3::MemoryValue::accessWidth):
+ * b3/B3MemoryValue.h:
+ * b3/B3MoveConstants.cpp:
+ * b3/B3PatchpointSpecial.cpp:
+ (JSC::B3::PatchpointSpecial::forEachArg):
+ * b3/B3StackmapSpecial.cpp:
+ (JSC::B3::StackmapSpecial::forEachArgImpl):
+ * b3/B3Value.h:
+ * b3/B3Variable.h:
+ (JSC::B3::Variable::width):
+ (JSC::B3::Variable::bank):
+ * b3/B3WasmAddressValue.h:
+ * b3/B3Width.cpp: Added.
+ (WTF::printInternal):
+ * b3/B3Width.h: Added.
+ (JSC::B3::pointerWidth):
+ (JSC::B3::widthForType):
+ (JSC::B3::conservativeWidth):
+ (JSC::B3::minimumWidth):
+ (JSC::B3::bytes):
+ (JSC::B3::widthForBytes):
+ * b3/air/AirAllocateRegistersByGraphColoring.cpp:
+ * b3/air/AirAllocateStack.cpp:
+ (JSC::B3::Air::allocateStack):
+ * b3/air/AirArg.cpp:
+ (JSC::B3::Air::Arg::canRepresent):
+ (JSC::B3::Air::Arg::isCompatibleBank):
+ (JSC::B3::Air::Arg::isCompatibleType): Deleted.
+ * b3/air/AirArg.h:
+ (JSC::B3::Air::Arg::hasBank):
+ (JSC::B3::Air::Arg::bank):
+ (JSC::B3::Air::Arg::isBank):
+ (JSC::B3::Air::Arg::forEachTmp):
+ (JSC::B3::Air::Arg::forEachType): Deleted.
+ (JSC::B3::Air::Arg::pointerWidth): Deleted.
+ (JSC::B3::Air::Arg::typeForB3Type): Deleted.
+ (JSC::B3::Air::Arg::widthForB3Type): Deleted.
+ (JSC::B3::Air::Arg::conservativeWidth): Deleted.
+ (JSC::B3::Air::Arg::minimumWidth): Deleted.
+ (JSC::B3::Air::Arg::bytes): Deleted.
+ (JSC::B3::Air::Arg::widthForBytes): Deleted.
+ (JSC::B3::Air::Arg::hasType): Deleted.
+ (JSC::B3::Air::Arg::type): Deleted.
+ (JSC::B3::Air::Arg::isType): Deleted.
+ * b3/air/AirArgInlines.h:
+ (JSC::B3::Air::ArgThingHelper<Tmp>::forEach):
+ (JSC::B3::Air::ArgThingHelper<Arg>::forEach):
+ (JSC::B3::Air::ArgThingHelper<Reg>::forEach):
+ (JSC::B3::Air::Arg::forEach):
+ * b3/air/AirCCallSpecial.cpp:
+ (JSC::B3::Air::CCallSpecial::forEachArg):
+ * b3/air/AirCCallingConvention.cpp:
+ * b3/air/AirCode.cpp:
+ (JSC::B3::Air::Code::Code):
+ (JSC::B3::Air::Code::setRegsInPriorityOrder):
+ (JSC::B3::Air::Code::pinRegister):
+ * b3/air/AirCode.h:
+ (JSC::B3::Air::Code::regsInPriorityOrder):
+ (JSC::B3::Air::Code::newTmp):
+ (JSC::B3::Air::Code::numTmps):
+ (JSC::B3::Air::Code::regsInPriorityOrderImpl):
+ * b3/air/AirCustom.cpp:
+ (JSC::B3::Air::PatchCustom::isValidForm):
+ (JSC::B3::Air::ShuffleCustom::isValidForm):
+ * b3/air/AirCustom.h:
+ (JSC::B3::Air::PatchCustom::forEachArg):
+ (JSC::B3::Air::CCallCustom::forEachArg):
+ (JSC::B3::Air::ColdCCallCustom::forEachArg):
+ (JSC::B3::Air::ShuffleCustom::forEachArg):
+ (JSC::B3::Air::WasmBoundsCheckCustom::forEachArg):
+ * b3/air/AirDumpAsJS.cpp:
+ (JSC::B3::Air::dumpAsJS):
+ * b3/air/AirEliminateDeadCode.cpp:
+ (JSC::B3::Air::eliminateDeadCode):
+ * b3/air/AirEmitShuffle.cpp:
+ (JSC::B3::Air::emitShuffle):
+ * b3/air/AirEmitShuffle.h:
+ (JSC::B3::Air::ShufflePair::ShufflePair):
+ (JSC::B3::Air::ShufflePair::width):
+ * b3/air/AirFixObviousSpills.cpp:
+ * b3/air/AirFixPartialRegisterStalls.cpp:
+ (JSC::B3::Air::fixPartialRegisterStalls):
+ * b3/air/AirInst.cpp:
+ (JSC::B3::Air::Inst::hasArgEffects):
+ * b3/air/AirInst.h:
+ (JSC::B3::Air::Inst::forEachTmp):
+ * b3/air/AirInstInlines.h:
+ (JSC::B3::Air::Inst::forEach):
+ (JSC::B3::Air::Inst::forEachDef):
+ (JSC::B3::Air::Inst::forEachDefWithExtraClobberedRegs):
+ * b3/air/AirLiveness.h:
+ (JSC::B3::Air::TmpLivenessAdapter::numIndices):
+ (JSC::B3::Air::TmpLivenessAdapter::acceptsBank):
+ (JSC::B3::Air::TmpLivenessAdapter::valueToIndex):
+ (JSC::B3::Air::TmpLivenessAdapter::indexToValue):
+ (JSC::B3::Air::StackSlotLivenessAdapter::acceptsBank):
+ (JSC::B3::Air::RegLivenessAdapter::acceptsBank):
+ (JSC::B3::Air::AbstractLiveness::AbstractLiveness):
+ (JSC::B3::Air::AbstractLiveness::LocalCalc::execute):
+ (JSC::B3::Air::TmpLivenessAdapter::acceptsType): Deleted.
+ (JSC::B3::Air::StackSlotLivenessAdapter::acceptsType): Deleted.
+ (JSC::B3::Air::RegLivenessAdapter::acceptsType): Deleted.
+ * b3/air/AirLogRegisterPressure.cpp:
+ (JSC::B3::Air::logRegisterPressure):
+ * b3/air/AirLowerAfterRegAlloc.cpp:
+ (JSC::B3::Air::lowerAfterRegAlloc):
+ * b3/air/AirLowerMacros.cpp:
+ (JSC::B3::Air::lowerMacros):
+ * b3/air/AirPadInterference.cpp:
+ (JSC::B3::Air::padInterference):
+ * b3/air/AirReportUsedRegisters.cpp:
+ (JSC::B3::Air::reportUsedRegisters):
+ * b3/air/AirSpillEverything.cpp:
+ (JSC::B3::Air::spillEverything):
+ * b3/air/AirTmpInlines.h:
+ (JSC::B3::Air::AbsoluteTmpMapper<Arg::GP>::absoluteIndex): Deleted.
+ (JSC::B3::Air::AbsoluteTmpMapper<Arg::GP>::lastMachineRegisterIndex): Deleted.
+ (JSC::B3::Air::AbsoluteTmpMapper<Arg::GP>::tmpFromAbsoluteIndex): Deleted.
+ (JSC::B3::Air::AbsoluteTmpMapper<Arg::FP>::absoluteIndex): Deleted.
+ (JSC::B3::Air::AbsoluteTmpMapper<Arg::FP>::lastMachineRegisterIndex): Deleted.
+ (JSC::B3::Air::AbsoluteTmpMapper<Arg::FP>::tmpFromAbsoluteIndex): Deleted.
+ * b3/air/AirTmpWidth.cpp:
+ (JSC::B3::Air::TmpWidth::recompute):
+ * b3/air/AirTmpWidth.h:
+ (JSC::B3::Air::TmpWidth::width):
+ (JSC::B3::Air::TmpWidth::requiredWidth):
+ (JSC::B3::Air::TmpWidth::defWidth):
+ (JSC::B3::Air::TmpWidth::useWidth):
+ (JSC::B3::Air::TmpWidth::Widths::Widths):
+ * b3/air/AirUseCounts.h:
+ (JSC::B3::Air::UseCounts::UseCounts):
+ * b3/air/AirValidate.cpp:
+ * b3/air/opcode_generator.rb:
+ * b3/air/testair.cpp:
+ (JSC::B3::Air::compile): Deleted.
+ (JSC::B3::Air::invoke): Deleted.
+ (JSC::B3::Air::compileAndRun): Deleted.
+ (JSC::B3::Air::testSimple): Deleted.
+ (JSC::B3::Air::loadConstantImpl): Deleted.
+ (JSC::B3::Air::loadConstant): Deleted.
+ (JSC::B3::Air::loadDoubleConstant): Deleted.
+ (JSC::B3::Air::testShuffleSimpleSwap): Deleted.
+ (JSC::B3::Air::testShuffleSimpleShift): Deleted.
+ (JSC::B3::Air::testShuffleLongShift): Deleted.
+ (JSC::B3::Air::testShuffleLongShiftBackwards): Deleted.
+ (JSC::B3::Air::testShuffleSimpleRotate): Deleted.
+ (JSC::B3::Air::testShuffleSimpleBroadcast): Deleted.
+ (JSC::B3::Air::testShuffleBroadcastAllRegs): Deleted.
+ (JSC::B3::Air::testShuffleTreeShift): Deleted.
+ (JSC::B3::Air::testShuffleTreeShiftBackward): Deleted.
+ (JSC::B3::Air::testShuffleTreeShiftOtherBackward): Deleted.
+ (JSC::B3::Air::testShuffleMultipleShifts): Deleted.
+ (JSC::B3::Air::testShuffleRotateWithFringe): Deleted.
+ (JSC::B3::Air::testShuffleRotateWithFringeInWeirdOrder): Deleted.
+ (JSC::B3::Air::testShuffleRotateWithLongFringe): Deleted.
+ (JSC::B3::Air::testShuffleMultipleRotates): Deleted.
+ (JSC::B3::Air::testShuffleShiftAndRotate): Deleted.
+ (JSC::B3::Air::testShuffleShiftAllRegs): Deleted.
+ (JSC::B3::Air::testShuffleRotateAllRegs): Deleted.
+ (JSC::B3::Air::testShuffleSimpleSwap64): Deleted.
+ (JSC::B3::Air::testShuffleSimpleShift64): Deleted.
+ (JSC::B3::Air::testShuffleSwapMixedWidth): Deleted.
+ (JSC::B3::Air::testShuffleShiftMixedWidth): Deleted.
+ (JSC::B3::Air::testShuffleShiftMemory): Deleted.
+ (JSC::B3::Air::testShuffleShiftMemoryLong): Deleted.
+ (JSC::B3::Air::testShuffleShiftMemoryAllRegs): Deleted.
+ (JSC::B3::Air::testShuffleShiftMemoryAllRegs64): Deleted.
+ (JSC::B3::Air::combineHiLo): Deleted.
+ (JSC::B3::Air::testShuffleShiftMemoryAllRegsMixedWidth): Deleted.
+ (JSC::B3::Air::testShuffleRotateMemory): Deleted.
+ (JSC::B3::Air::testShuffleRotateMemory64): Deleted.
+ (JSC::B3::Air::testShuffleRotateMemoryMixedWidth): Deleted.
+ (JSC::B3::Air::testShuffleRotateMemoryAllRegs64): Deleted.
+ (JSC::B3::Air::testShuffleRotateMemoryAllRegsMixedWidth): Deleted.
+ (JSC::B3::Air::testShuffleSwapDouble): Deleted.
+ (JSC::B3::Air::testShuffleShiftDouble): Deleted.
+ (JSC::B3::Air::testX86VMULSD): Deleted.
+ (JSC::B3::Air::testX86VMULSDDestRex): Deleted.
+ (JSC::B3::Air::testX86VMULSDOp1DestRex): Deleted.
+ (JSC::B3::Air::testX86VMULSDOp2DestRex): Deleted.
+ (JSC::B3::Air::testX86VMULSDOpsDestRex): Deleted.
+ (JSC::B3::Air::testX86VMULSDAddr): Deleted.
+ (JSC::B3::Air::testX86VMULSDAddrOpRexAddr): Deleted.
+ (JSC::B3::Air::testX86VMULSDDestRexAddr): Deleted.
+ (JSC::B3::Air::testX86VMULSDRegOpDestRexAddr): Deleted.
+ (JSC::B3::Air::testX86VMULSDAddrOpDestRexAddr): Deleted.
+ (JSC::B3::Air::testX86VMULSDBaseNeedsRex): Deleted.
+ (JSC::B3::Air::testX86VMULSDIndexNeedsRex): Deleted.
+ (JSC::B3::Air::testX86VMULSDBaseIndexNeedRex): Deleted.
+ (JSC::B3::Air::run): Deleted.
+
2017-02-24 Keith Miller <keith_miller@apple.com>
We should be able to use std::tuples as keys in HashMap
diff --git a/Source/JavaScriptCore/JavaScriptCore.xcodeproj/project.pbxproj b/Source/JavaScriptCore/JavaScriptCore.xcodeproj/project.pbxproj
index c123b06..a5d9f8b 100644
--- a/Source/JavaScriptCore/JavaScriptCore.xcodeproj/project.pbxproj
+++ b/Source/JavaScriptCore/JavaScriptCore.xcodeproj/project.pbxproj
@@ -270,6 +270,10 @@
0F2BDC4F15228BF300CD8910 /* DFGValueSource.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 0F2BDC4E15228BE700CD8910 /* DFGValueSource.cpp */; };
0F2BDC5115228FFD00CD8910 /* DFGVariableEvent.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 0F2BDC5015228FFA00CD8910 /* DFGVariableEvent.cpp */; };
0F2C63AA1E4FA42E00C13839 /* RunningScope.h in Headers */ = {isa = PBXBuildFile; fileRef = 0F2C63A91E4FA42C00C13839 /* RunningScope.h */; settings = {ATTRIBUTES = (Private, ); }; };
+ 0F2C63AF1E60AE4100C13839 /* B3Bank.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 0F2C63AB1E60AE3C00C13839 /* B3Bank.cpp */; };
+ 0F2C63B01E60AE4300C13839 /* B3Bank.h in Headers */ = {isa = PBXBuildFile; fileRef = 0F2C63AC1E60AE3C00C13839 /* B3Bank.h */; };
+ 0F2C63B11E60AE4500C13839 /* B3Width.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 0F2C63AD1E60AE3C00C13839 /* B3Width.cpp */; };
+ 0F2C63B21E60AE4700C13839 /* B3Width.h in Headers */ = {isa = PBXBuildFile; fileRef = 0F2C63AE1E60AE3D00C13839 /* B3Width.h */; };
0F2D4DDD19832D34007D4B19 /* DebuggerScope.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 0F2D4DDB19832D34007D4B19 /* DebuggerScope.cpp */; };
0F2D4DDE19832D34007D4B19 /* DebuggerScope.h in Headers */ = {isa = PBXBuildFile; fileRef = 0F2D4DDC19832D34007D4B19 /* DebuggerScope.h */; settings = {ATTRIBUTES = (Private, ); }; };
0F2D4DE819832DAC007D4B19 /* ToThisStatus.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 0F2D4DE519832DAC007D4B19 /* ToThisStatus.cpp */; };
@@ -2756,6 +2760,10 @@
0F2BDC4E15228BE700CD8910 /* DFGValueSource.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; name = DFGValueSource.cpp; path = dfg/DFGValueSource.cpp; sourceTree = "<group>"; };
0F2BDC5015228FFA00CD8910 /* DFGVariableEvent.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; name = DFGVariableEvent.cpp; path = dfg/DFGVariableEvent.cpp; sourceTree = "<group>"; };
0F2C63A91E4FA42C00C13839 /* RunningScope.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = RunningScope.h; sourceTree = "<group>"; };
+ 0F2C63AB1E60AE3C00C13839 /* B3Bank.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; name = B3Bank.cpp; path = b3/B3Bank.cpp; sourceTree = "<group>"; };
+ 0F2C63AC1E60AE3C00C13839 /* B3Bank.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; name = B3Bank.h; path = b3/B3Bank.h; sourceTree = "<group>"; };
+ 0F2C63AD1E60AE3C00C13839 /* B3Width.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; name = B3Width.cpp; path = b3/B3Width.cpp; sourceTree = "<group>"; };
+ 0F2C63AE1E60AE3D00C13839 /* B3Width.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; name = B3Width.h; path = b3/B3Width.h; sourceTree = "<group>"; };
0F2D4DDB19832D34007D4B19 /* DebuggerScope.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = DebuggerScope.cpp; sourceTree = "<group>"; };
0F2D4DDC19832D34007D4B19 /* DebuggerScope.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = DebuggerScope.h; sourceTree = "<group>"; };
0F2D4DDF19832D91007D4B19 /* TypeProfilerLog.cpp */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.cpp.cpp; path = TypeProfilerLog.cpp; sourceTree = "<group>"; };
@@ -5284,6 +5292,8 @@
0FEC84B31BDACD880080FF74 /* air */,
0FEC84B41BDACDAC0080FF74 /* B3ArgumentRegValue.cpp */,
0FEC84B51BDACDAC0080FF74 /* B3ArgumentRegValue.h */,
+ 0F2C63AB1E60AE3C00C13839 /* B3Bank.cpp */,
+ 0F2C63AC1E60AE3C00C13839 /* B3Bank.h */,
0FEC84B61BDACDAC0080FF74 /* B3BasicBlock.cpp */,
0FEC84B71BDACDAC0080FF74 /* B3BasicBlock.h */,
0FEC84B81BDACDAC0080FF74 /* B3BasicBlockInlines.h */,
@@ -5440,6 +5450,8 @@
53D444DB1DAF08AB00B92784 /* B3WasmAddressValue.h */,
5341FC6F1DAC33E500E7E4D7 /* B3WasmBoundsCheckValue.cpp */,
5341FC711DAC343C00E7E4D7 /* B3WasmBoundsCheckValue.h */,
+ 0F2C63AD1E60AE3C00C13839 /* B3Width.cpp */,
+ 0F2C63AE1E60AE3D00C13839 /* B3Width.h */,
0FEC85AE1BDB5D5E0080FF74 /* testb3.cpp */,
);
name = b3;
@@ -7915,6 +7927,7 @@
isa = PBXHeadersBuildPhase;
buildActionMask = 2147483647;
files = (
+ 0F2C63B21E60AE4700C13839 /* B3Width.h in Headers */,
0FFA549816B8835300B3A982 /* A64DOpcode.h in Headers */,
0F1FE51C1922A3BC006987C5 /* AbortReason.h in Headers */,
860161E30F3A83C100F84710 /* AbstractMacroAssembler.h in Headers */,
@@ -8390,6 +8403,7 @@
0F2FCCFF18A60070001A27F8 /* DFGThreadData.h in Headers */,
0FC097A2146B28CC00CF2442 /* DFGThunks.h in Headers */,
0FD8A32817D51F5700CA2C40 /* DFGTierUpCheckInjectionPhase.h in Headers */,
+ 0F2C63B01E60AE4300C13839 /* B3Bank.h in Headers */,
0FD8A32A17D51F5700CA2C40 /* DFGToFTLDeferredCompilationCallback.h in Headers */,
0FD8A32C17D51F5700CA2C40 /* DFGToFTLForOSREntryDeferredCompilationCallback.h in Headers */,
0FE7211E193B9C590031F6ED /* DFGTransition.h in Headers */,
@@ -9806,6 +9820,7 @@
0FB3878F1BFBC44D00E3AB1E /* AirOptimizeBlockOrder.cpp in Sources */,
0F9CABC81DB54A780008E83B /* AirPadInterference.cpp in Sources */,
0FEC85831BDACDC70080FF74 /* AirPhaseScope.cpp in Sources */,
+ 0F2C63B11E60AE4500C13839 /* B3Width.cpp in Sources */,
0F45703C1BE45F0A0062A629 /* AirReportUsedRegisters.cpp in Sources */,
0F338DFD1BED51270013C88F /* AirSimplifyCFG.cpp in Sources */,
0FEC85871BDACDC70080FF74 /* AirSpecial.cpp in Sources */,
@@ -10531,6 +10546,7 @@
14280844107EC0930013E7B2 /* RegExpPrototype.cpp in Sources */,
6540C7A01B82E1C3000F6B79 /* RegisterAtOffset.cpp in Sources */,
6540C7A11B82E1C3000F6B79 /* RegisterAtOffsetList.cpp in Sources */,
+ 0F2C63AF1E60AE4100C13839 /* B3Bank.cpp in Sources */,
0FC3141518146D7000033232 /* RegisterSet.cpp in Sources */,
0FD0E5EC1E43D3530006AB08 /* GCConductor.cpp in Sources */,
A57D23ED1891B5540031C7FA /* RegularExpression.cpp in Sources */,
diff --git a/Source/JavaScriptCore/b3/B3Bank.cpp b/Source/JavaScriptCore/b3/B3Bank.cpp
new file mode 100644
index 0000000..6dd366c
--- /dev/null
+++ b/Source/JavaScriptCore/b3/B3Bank.cpp
@@ -0,0 +1,51 @@
+/*
+ * Copyright (C) 2017 Apple Inc. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY APPLE INC. ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL APPLE INC. OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "config.h"
+#include "B3Bank.h"
+
+#if ENABLE(B3_JIT)
+
+#include <wtf/PrintStream.h>
+
+namespace WTF {
+
+void printInternal(PrintStream& out, JSC::B3::Bank bank)
+{
+ switch (bank) {
+ case JSC::B3::GP:
+ out.print("GP");
+ return;
+ case JSC::B3::FP:
+ out.print("FP");
+ return;
+ }
+
+ RELEASE_ASSERT_NOT_REACHED();
+}
+
+} // namespace WTF
+
+#endif // ENABLE(B3_JIT)
diff --git a/Source/JavaScriptCore/b3/B3Bank.h b/Source/JavaScriptCore/b3/B3Bank.h
new file mode 100644
index 0000000..6b569a3
--- /dev/null
+++ b/Source/JavaScriptCore/b3/B3Bank.h
@@ -0,0 +1,76 @@
+/*
+ * Copyright (C) 2017 Apple Inc. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY APPLE INC. ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL APPLE INC. OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#pragma once
+
+#if ENABLE(B3_JIT)
+
+#include "B3Type.h"
+
+namespace JSC { namespace B3 {
+
+enum Bank : int8_t {
+ GP,
+ FP
+};
+
+static const unsigned numBanks = 2;
+
+template<typename Func>
+void forEachBank(const Func& func)
+{
+ func(GP);
+ func(FP);
+}
+
+inline Bank bankForType(Type type)
+{
+ switch (type) {
+ case Void:
+ ASSERT_NOT_REACHED();
+ return GP;
+ case Int32:
+ case Int64:
+ return GP;
+ case Float:
+ case Double:
+ return FP;
+ }
+ ASSERT_NOT_REACHED();
+ return GP;
+}
+
+} } // namespace JSC::B3
+
+namespace WTF {
+
+class PrintStream;
+
+void printInternal(PrintStream&, JSC::B3::Bank);
+
+} // namespace WTF
+
+#endif // ENABLE(B3_JIT)
+
diff --git a/Source/JavaScriptCore/b3/B3CheckSpecial.cpp b/Source/JavaScriptCore/b3/B3CheckSpecial.cpp
index 6f7826c..9f075c4 100644
--- a/Source/JavaScriptCore/b3/B3CheckSpecial.cpp
+++ b/Source/JavaScriptCore/b3/B3CheckSpecial.cpp
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2015-2016 Apple Inc. All rights reserved.
+ * Copyright (C) 2015-2017 Apple Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -110,9 +110,9 @@
{
Inst hidden = hiddenBranch(inst);
hidden.forEachArg(
- [&] (Arg& arg, Arg::Role role, Arg::Type type, Arg::Width width) {
+ [&] (Arg& arg, Arg::Role role, Bank bank, Width width) {
unsigned index = &arg - &hidden.args[0];
- callback(inst.args[1 + index], role, type, width);
+ callback(inst.args[1 + index], role, bank, width);
});
std::optional<unsigned> firstRecoverableIndex;
diff --git a/Source/JavaScriptCore/b3/B3LegalizeMemoryOffsets.cpp b/Source/JavaScriptCore/b3/B3LegalizeMemoryOffsets.cpp
index 8c17ff5..d5c2936 100644
--- a/Source/JavaScriptCore/b3/B3LegalizeMemoryOffsets.cpp
+++ b/Source/JavaScriptCore/b3/B3LegalizeMemoryOffsets.cpp
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2015 Apple Inc. All rights reserved.
+ * Copyright (C) 2015-2017 Apple Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -59,7 +59,7 @@
continue;
int32_t offset = memoryValue->offset();
- Air::Arg::Width width = Air::Arg::widthForBytes(memoryValue->accessByteSize());
+ Width width = memoryValue->accessWidth();
if (!Air::Arg::isValidAddrForm(offset, width)) {
Value* base = memoryValue->lastChild();
Value* offsetValue = m_insertionSet.insertIntConstant(index, memoryValue->origin(), pointerType(), offset);
diff --git a/Source/JavaScriptCore/b3/B3LowerToAir.cpp b/Source/JavaScriptCore/b3/B3LowerToAir.cpp
index 29a4379..517d088 100644
--- a/Source/JavaScriptCore/b3/B3LowerToAir.cpp
+++ b/Source/JavaScriptCore/b3/B3LowerToAir.cpp
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2015-2016 Apple Inc. All rights reserved.
+ * Copyright (C) 2015-2017 Apple Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -94,7 +94,7 @@
for (Value* value : m_procedure.values()) {
switch (value->opcode()) {
case Phi: {
- m_phiToTmp[value] = m_code.newTmp(Arg::typeForB3Type(value->type()));
+ m_phiToTmp[value] = m_code.newTmp(value->resultBank());
if (verbose)
dataLog("Phi tmp for ", *value, ": ", m_phiToTmp[value], "\n");
break;
@@ -107,7 +107,7 @@
for (B3::StackSlot* stack : m_procedure.stackSlots())
m_stackToStack.add(stack, m_code.addStackSlot(stack));
for (Variable* variable : m_procedure.variables())
- m_variableToTmp.add(variable, m_code.newTmp(Arg::typeForB3Type(variable->type())));
+ m_variableToTmp.add(variable, m_code.newTmp(variable->bank()));
// Figure out which blocks are not rare.
m_fastWorklist.push(m_procedure[0]);
@@ -361,7 +361,7 @@
Tmp& realTmp = m_valueToTmp[value];
if (!realTmp) {
- realTmp = m_code.newTmp(Arg::typeForB3Type(value->type()));
+ realTmp = m_code.newTmp(value->resultBank());
if (m_procedure.isFastConstant(value->key()))
m_code.addFastTmp(realTmp);
if (verbose)
@@ -427,7 +427,7 @@
return true;
}
- std::optional<unsigned> scaleForShl(Value* shl, int32_t offset, std::optional<Arg::Width> width = std::nullopt)
+ std::optional<unsigned> scaleForShl(Value* shl, int32_t offset, std::optional<Width> width = std::nullopt)
{
if (shl->opcode() != Shl)
return std::nullopt;
@@ -450,7 +450,7 @@
}
// This turns the given operand into an address.
- Arg effectiveAddr(Value* address, int32_t offset, Arg::Width width)
+ Arg effectiveAddr(Value* address, int32_t offset, Width width)
{
ASSERT(Arg::isValidAddrForm(offset, width));
@@ -538,7 +538,7 @@
return Arg();
int32_t offset = value->offset();
- Arg::Width width = Arg::widthForBytes(value->accessByteSize());
+ Width width = value->accessWidth();
Arg result = effectiveAddr(value->lastChild(), offset, width);
ASSERT(result.isValidForm(width));
@@ -1137,8 +1137,8 @@
template<typename CompareFunctor, typename TestFunctor, typename CompareDoubleFunctor, typename CompareFloatFunctor>
Inst createGenericCompare(
Value* value,
- const CompareFunctor& compare, // Signature: (Arg::Width, Arg relCond, Arg, Arg) -> Inst
- const TestFunctor& test, // Signature: (Arg::Width, Arg resCond, Arg, Arg) -> Inst
+ const CompareFunctor& compare, // Signature: (Width, Arg relCond, Arg, Arg) -> Inst
+ const TestFunctor& test, // Signature: (Width, Arg resCond, Arg, Arg) -> Inst
const CompareDoubleFunctor& compareDouble, // Signature: (Arg doubleCond, Arg, Arg) -> Inst
const CompareFloatFunctor& compareFloat, // Signature: (Arg doubleCond, Arg, Arg) -> Inst
bool inverted = false)
@@ -1300,7 +1300,7 @@
Arg rightImm = imm(right);
auto tryCompare = [&] (
- Arg::Width width, ArgPromise&& left, ArgPromise&& right) -> Inst {
+ Width width, ArgPromise&& left, ArgPromise&& right) -> Inst {
if (Inst result = compare(width, relCond, left, right))
return result;
if (Inst result = compare(width, relCond.flipped(), right, left))
@@ -1309,7 +1309,7 @@
};
auto tryCompareLoadImm = [&] (
- Arg::Width width, B3::Opcode loadOpcode, Arg::Signedness signedness) -> Inst {
+ Width width, B3::Opcode loadOpcode, Arg::Signedness signedness) -> Inst {
if (rightImm && rightImm.isRepresentableAs(width, signedness)) {
if (Inst result = tryCompare(width, loadPromise(left, loadOpcode), rightImm)) {
commitInternal(left);
@@ -1325,7 +1325,7 @@
return Inst();
};
- Arg::Width width = Arg::widthForB3Type(value->child(0)->type());
+ Width width = value->child(0)->resultWidth();
if (canCommitInternal) {
// First handle compares that involve fewer bits than B3's type system supports.
@@ -1338,22 +1338,22 @@
// Branch(@3)
if (relCond.isSignedCond()) {
- if (Inst result = tryCompareLoadImm(Arg::Width8, Load8S, Arg::Signed))
+ if (Inst result = tryCompareLoadImm(Width8, Load8S, Arg::Signed))
return result;
}
if (relCond.isUnsignedCond()) {
- if (Inst result = tryCompareLoadImm(Arg::Width8, Load8Z, Arg::Unsigned))
+ if (Inst result = tryCompareLoadImm(Width8, Load8Z, Arg::Unsigned))
return result;
}
if (relCond.isSignedCond()) {
- if (Inst result = tryCompareLoadImm(Arg::Width16, Load16S, Arg::Signed))
+ if (Inst result = tryCompareLoadImm(Width16, Load16S, Arg::Signed))
return result;
}
if (relCond.isUnsignedCond()) {
- if (Inst result = tryCompareLoadImm(Arg::Width16, Load16Z, Arg::Unsigned))
+ if (Inst result = tryCompareLoadImm(Width16, Load16Z, Arg::Unsigned))
return result;
}
@@ -1402,11 +1402,11 @@
return compareDouble(doubleCond, leftPromise, rightPromise);
};
- Arg::Width width = Arg::widthForB3Type(value->type());
+ Width width = value->resultWidth();
Arg resCond = Arg::resCond(MacroAssembler::NonZero).inverted(inverted);
auto tryTest = [&] (
- Arg::Width width, ArgPromise&& left, ArgPromise&& right) -> Inst {
+ Width width, ArgPromise&& left, ArgPromise&& right) -> Inst {
if (Inst result = test(width, resCond, left, right))
return result;
if (Inst result = test(width, resCond, right, left))
@@ -1457,7 +1457,7 @@
rightImm64 = bitImm64(right);
}
- auto tryTestLoadImm = [&] (Arg::Width width, Arg::Signedness signedness, B3::Opcode loadOpcode) -> Inst {
+ auto tryTestLoadImm = [&] (Width width, Arg::Signedness signedness, B3::Opcode loadOpcode) -> Inst {
if (!hasRightConst)
return Inst();
// Signed loads will create high bits, so if the immediate has high bits
@@ -1491,16 +1491,16 @@
if (canCommitInternal) {
// First handle test's that involve fewer bits than B3's type system supports.
- if (Inst result = tryTestLoadImm(Arg::Width8, Arg::Unsigned, Load8Z))
+ if (Inst result = tryTestLoadImm(Width8, Arg::Unsigned, Load8Z))
return result;
- if (Inst result = tryTestLoadImm(Arg::Width8, Arg::Signed, Load8S))
+ if (Inst result = tryTestLoadImm(Width8, Arg::Signed, Load8S))
return result;
- if (Inst result = tryTestLoadImm(Arg::Width16, Arg::Unsigned, Load16Z))
+ if (Inst result = tryTestLoadImm(Width16, Arg::Unsigned, Load16Z))
return result;
- if (Inst result = tryTestLoadImm(Arg::Width16, Arg::Signed, Load16S))
+ if (Inst result = tryTestLoadImm(Width16, Arg::Signed, Load16S))
return result;
// This allows us to use a 32-bit test for 64-bit BitAnd if the immediate is
@@ -1508,7 +1508,7 @@
// as if we were pondering using a 32-bit test for
// BitAnd(SExt(Load(ptr)), const), in the sense that in both cases we have
// to worry about high bits. So, we use the "Signed" version of this helper.
- if (Inst result = tryTestLoadImm(Arg::Width32, Arg::Signed, Load))
+ if (Inst result = tryTestLoadImm(Width32, Arg::Signed, Load))
return result;
// This is needed to handle 32-bit test for arbitrary 32-bit immediates.
@@ -1517,7 +1517,7 @@
// Now handle test's that involve a load.
- Arg::Width width = Arg::widthForB3Type(value->child(0)->type());
+ Width width = value->child(0)->resultWidth();
if (Inst result = tryTest(width, loadPromise(left), tmpPromise(right))) {
commitInternal(left);
return result;
@@ -1532,15 +1532,15 @@
// Now handle test's that involve an immediate and a tmp.
if (hasRightConst) {
- if ((width == Arg::Width32 && rightConst == 0xffffffff)
- || (width == Arg::Width64 && rightConst == -1)) {
+ if ((width == Width32 && rightConst == 0xffffffff)
+ || (width == Width64 && rightConst == -1)) {
if (Inst result = tryTest(width, tmpPromise(left), tmpPromise(left)))
return result;
}
if (isRepresentableAs<uint32_t>(rightConst)) {
- if (Inst result = tryTest(Arg::Width32, tmpPromise(left), rightImm))
+ if (Inst result = tryTest(Width32, tmpPromise(left), rightImm))
return result;
- if (Inst result = tryTest(Arg::Width32, tmpPromise(left), rightImm64))
+ if (Inst result = tryTest(Width32, tmpPromise(left), rightImm64))
return result;
}
if (Inst result = tryTest(width, tmpPromise(left), rightImm))
@@ -1568,22 +1568,22 @@
if (canCommitInternal && value->as<MemoryValue>()) {
// Handle things like Branch(Load8Z(value))
- if (Inst result = tryTest(Arg::Width8, loadPromise(value, Load8Z), Arg::bitImm(-1))) {
+ if (Inst result = tryTest(Width8, loadPromise(value, Load8Z), Arg::bitImm(-1))) {
commitInternal(value);
return result;
}
- if (Inst result = tryTest(Arg::Width8, loadPromise(value, Load8S), Arg::bitImm(-1))) {
+ if (Inst result = tryTest(Width8, loadPromise(value, Load8S), Arg::bitImm(-1))) {
commitInternal(value);
return result;
}
- if (Inst result = tryTest(Arg::Width16, loadPromise(value, Load16Z), Arg::bitImm(-1))) {
+ if (Inst result = tryTest(Width16, loadPromise(value, Load16Z), Arg::bitImm(-1))) {
commitInternal(value);
return result;
}
- if (Inst result = tryTest(Arg::Width16, loadPromise(value, Load16S), Arg::bitImm(-1))) {
+ if (Inst result = tryTest(Width16, loadPromise(value, Load16S), Arg::bitImm(-1))) {
commitInternal(value);
return result;
}
@@ -1612,26 +1612,26 @@
return createGenericCompare(
value,
[this] (
- Arg::Width width, const Arg& relCond,
+ Width width, const Arg& relCond,
ArgPromise& left, ArgPromise& right) -> Inst {
switch (width) {
- case Arg::Width8:
+ case Width8:
if (isValidForm(Branch8, Arg::RelCond, left.kind(), right.kind())) {
return left.inst(right.inst(
Branch8, m_value, relCond,
left.consume(*this), right.consume(*this)));
}
return Inst();
- case Arg::Width16:
+ case Width16:
return Inst();
- case Arg::Width32:
+ case Width32:
if (isValidForm(Branch32, Arg::RelCond, left.kind(), right.kind())) {
return left.inst(right.inst(
Branch32, m_value, relCond,
left.consume(*this), right.consume(*this)));
}
return Inst();
- case Arg::Width64:
+ case Width64:
if (isValidForm(Branch64, Arg::RelCond, left.kind(), right.kind())) {
return left.inst(right.inst(
Branch64, m_value, relCond,
@@ -1642,26 +1642,26 @@
ASSERT_NOT_REACHED();
},
[this] (
- Arg::Width width, const Arg& resCond,
+ Width width, const Arg& resCond,
ArgPromise& left, ArgPromise& right) -> Inst {
switch (width) {
- case Arg::Width8:
+ case Width8:
if (isValidForm(BranchTest8, Arg::ResCond, left.kind(), right.kind())) {
return left.inst(right.inst(
BranchTest8, m_value, resCond,
left.consume(*this), right.consume(*this)));
}
return Inst();
- case Arg::Width16:
+ case Width16:
return Inst();
- case Arg::Width32:
+ case Width32:
if (isValidForm(BranchTest32, Arg::ResCond, left.kind(), right.kind())) {
return left.inst(right.inst(
BranchTest32, m_value, resCond,
left.consume(*this), right.consume(*this)));
}
return Inst();
- case Arg::Width64:
+ case Width64:
if (isValidForm(BranchTest64, Arg::ResCond, left.kind(), right.kind())) {
return left.inst(right.inst(
BranchTest64, m_value, resCond,
@@ -1695,20 +1695,20 @@
return createGenericCompare(
value,
[this] (
- Arg::Width width, const Arg& relCond,
+ Width width, const Arg& relCond,
ArgPromise& left, ArgPromise& right) -> Inst {
switch (width) {
- case Arg::Width8:
- case Arg::Width16:
+ case Width8:
+ case Width16:
return Inst();
- case Arg::Width32:
+ case Width32:
if (isValidForm(Compare32, Arg::RelCond, left.kind(), right.kind(), Arg::Tmp)) {
return left.inst(right.inst(
Compare32, m_value, relCond,
left.consume(*this), right.consume(*this), tmp(m_value)));
}
return Inst();
- case Arg::Width64:
+ case Width64:
if (isValidForm(Compare64, Arg::RelCond, left.kind(), right.kind(), Arg::Tmp)) {
return left.inst(right.inst(
Compare64, m_value, relCond,
@@ -1719,20 +1719,20 @@
ASSERT_NOT_REACHED();
},
[this] (
- Arg::Width width, const Arg& resCond,
+ Width width, const Arg& resCond,
ArgPromise& left, ArgPromise& right) -> Inst {
switch (width) {
- case Arg::Width8:
- case Arg::Width16:
+ case Width8:
+ case Width16:
return Inst();
- case Arg::Width32:
+ case Width32:
if (isValidForm(Test32, Arg::ResCond, left.kind(), right.kind(), Arg::Tmp)) {
return left.inst(right.inst(
Test32, m_value, resCond,
left.consume(*this), right.consume(*this), tmp(m_value)));
}
return Inst();
- case Arg::Width64:
+ case Width64:
if (isValidForm(Test64, Arg::ResCond, left.kind(), right.kind(), Arg::Tmp)) {
return left.inst(right.inst(
Test64, m_value, resCond,
@@ -1793,36 +1793,32 @@
return createGenericCompare(
m_value->child(0),
- [&] (
- Arg::Width width, const Arg& relCond,
- ArgPromise& left, ArgPromise& right) -> Inst {
+ [&] (Width width, const Arg& relCond, ArgPromise& left, ArgPromise& right) -> Inst {
switch (width) {
- case Arg::Width8:
+ case Width8:
// FIXME: Support these things.
// https://bugs.webkit.org/show_bug.cgi?id=151504
return Inst();
- case Arg::Width16:
+ case Width16:
return Inst();
- case Arg::Width32:
+ case Width32:
return createSelectInstruction(config.moveConditionally32, relCond, left, right);
- case Arg::Width64:
+ case Width64:
return createSelectInstruction(config.moveConditionally64, relCond, left, right);
}
ASSERT_NOT_REACHED();
},
- [&] (
- Arg::Width width, const Arg& resCond,
- ArgPromise& left, ArgPromise& right) -> Inst {
+ [&] (Width width, const Arg& resCond, ArgPromise& left, ArgPromise& right) -> Inst {
switch (width) {
- case Arg::Width8:
+ case Width8:
// FIXME: Support more things.
// https://bugs.webkit.org/show_bug.cgi?id=151504
return Inst();
- case Arg::Width16:
+ case Width16:
return Inst();
- case Arg::Width32:
+ case Width32:
return createSelectInstruction(config.moveConditionallyTest32, resCond, left, right);
- case Arg::Width64:
+ case Width64:
return createSelectInstruction(config.moveConditionallyTest64, resCond, left, right);
}
ASSERT_NOT_REACHED();
@@ -2535,9 +2531,9 @@
patchpointValue->lateClobbered().clear(patchpointValue->resultConstraint.reg());
for (unsigned i = patchpointValue->numGPScratchRegisters; i--;)
- inst.args.append(m_code.newTmp(Arg::GP));
+ inst.args.append(m_code.newTmp(GP));
for (unsigned i = patchpointValue->numFPScratchRegisters; i--;)
- inst.args.append(m_code.newTmp(Arg::FP));
+ inst.args.append(m_code.newTmp(FP));
m_insts.last().append(WTFMove(inst));
m_insts.last().appendVector(after);
@@ -2619,8 +2615,8 @@
} else if (isValidForm(opcode, Arg::ResCond, Arg::Tmp, Arg::Tmp, Arg::Tmp, Arg::Tmp, Arg::Tmp)) {
sources.append(tmp(left));
sources.append(tmp(right));
- sources.append(m_code.newTmp(Arg::typeForB3Type(m_value->type())));
- sources.append(m_code.newTmp(Arg::typeForB3Type(m_value->type())));
+ sources.append(m_code.newTmp(m_value->resultBank()));
+ sources.append(m_code.newTmp(m_value->resultBank()));
}
// There is a really hilarious case that arises when we do BranchAdd32(%x, %x). We won't emit
@@ -2682,13 +2678,13 @@
Value* ptr = value->child(0);
- Arg temp = m_code.newTmp(Arg::GP);
+ Arg temp = m_code.newTmp(GP);
append(Inst(Move32, value, tmp(ptr), temp));
if (value->offset()) {
if (imm(value->offset()))
append(Add64, imm(value->offset()), temp);
else {
- Arg bigImm = m_code.newTmp(Arg::GP);
+ Arg bigImm = m_code.newTmp(GP);
append(Move, Arg::bigImm(value->offset()), bigImm);
append(Add64, bigImm, temp);
}
diff --git a/Source/JavaScriptCore/b3/B3MemoryValue.cpp b/Source/JavaScriptCore/b3/B3MemoryValue.cpp
index 3764b74..e73a0fd 100644
--- a/Source/JavaScriptCore/b3/B3MemoryValue.cpp
+++ b/Source/JavaScriptCore/b3/B3MemoryValue.cpp
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2015-2016 Apple Inc. All rights reserved.
+ * Copyright (C) 2015-2017 Apple Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -55,6 +55,11 @@
}
}
+Width MemoryValue::accessWidth() const
+{
+ return widthForBytes(accessByteSize());
+}
+
void MemoryValue::dumpMeta(CommaPrinter& comma, PrintStream& out) const
{
if (m_offset)
diff --git a/Source/JavaScriptCore/b3/B3MemoryValue.h b/Source/JavaScriptCore/b3/B3MemoryValue.h
index 9a0504f..5b53939 100644
--- a/Source/JavaScriptCore/b3/B3MemoryValue.h
+++ b/Source/JavaScriptCore/b3/B3MemoryValue.h
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2015-2016 Apple Inc. All rights reserved.
+ * Copyright (C) 2015-2017 Apple Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -83,6 +83,7 @@
bool isLoad() const { return type() != Void; }
size_t accessByteSize() const;
+ Width accessWidth() const;
protected:
void dumpMeta(CommaPrinter& comma, PrintStream&) const override;
diff --git a/Source/JavaScriptCore/b3/B3MoveConstants.cpp b/Source/JavaScriptCore/b3/B3MoveConstants.cpp
index 0d98773..5b29376 100644
--- a/Source/JavaScriptCore/b3/B3MoveConstants.cpp
+++ b/Source/JavaScriptCore/b3/B3MoveConstants.cpp
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2015-2016 Apple Inc. All rights reserved.
+ * Copyright (C) 2015-2017 Apple Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -28,6 +28,7 @@
#if ENABLE(B3_JIT)
+#include "AirArg.h"
#include "B3BasicBlockInlines.h"
#include "B3Dominators.h"
#include "B3InsertionSetInlines.h"
@@ -207,7 +208,7 @@
return false;
return Air::Arg::isValidAddrForm(
static_cast<int32_t>(offset),
- Air::Arg::widthForBytes(memoryValue->accessByteSize()));
+ widthForBytes(memoryValue->accessByteSize()));
});
if (bestPointer) {
diff --git a/Source/JavaScriptCore/b3/B3PatchpointSpecial.cpp b/Source/JavaScriptCore/b3/B3PatchpointSpecial.cpp
index c5fc588..7974bce 100644
--- a/Source/JavaScriptCore/b3/B3PatchpointSpecial.cpp
+++ b/Source/JavaScriptCore/b3/B3PatchpointSpecial.cpp
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2015-2016 Apple Inc. All rights reserved.
+ * Copyright (C) 2015-2017 Apple Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -56,16 +56,16 @@
else
role = Arg::Def;
- callback(inst.args[argIndex++], role, inst.origin->airType(), inst.origin->airWidth());
+ callback(inst.args[argIndex++], role, inst.origin->resultBank(), inst.origin->resultWidth());
}
forEachArgImpl(0, argIndex, inst, SameAsRep, std::nullopt, callback);
argIndex += inst.origin->numChildren();
for (unsigned i = patchpoint->numGPScratchRegisters; i--;)
- callback(inst.args[argIndex++], Arg::Scratch, Arg::GP, Arg::conservativeWidth(Arg::GP));
+ callback(inst.args[argIndex++], Arg::Scratch, GP, conservativeWidth(GP));
for (unsigned i = patchpoint->numFPScratchRegisters; i--;)
- callback(inst.args[argIndex++], Arg::Scratch, Arg::FP, Arg::conservativeWidth(Arg::FP));
+ callback(inst.args[argIndex++], Arg::Scratch, FP, conservativeWidth(FP));
}
bool PatchpointSpecial::isValid(Inst& inst)
diff --git a/Source/JavaScriptCore/b3/B3StackmapSpecial.cpp b/Source/JavaScriptCore/b3/B3StackmapSpecial.cpp
index b5aa6c3..a0c215e 100644
--- a/Source/JavaScriptCore/b3/B3StackmapSpecial.cpp
+++ b/Source/JavaScriptCore/b3/B3StackmapSpecial.cpp
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2015-2016 Apple Inc. All rights reserved.
+ * Copyright (C) 2015-2017 Apple Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -127,7 +127,7 @@
}
Type type = child.value()->type();
- callback(arg, role, Arg::typeForB3Type(type), Arg::widthForB3Type(type));
+ callback(arg, role, bankForType(type), widthForType(type));
}
}
diff --git a/Source/JavaScriptCore/b3/B3Value.h b/Source/JavaScriptCore/b3/B3Value.h
index ebe52ad..408c7fa 100644
--- a/Source/JavaScriptCore/b3/B3Value.h
+++ b/Source/JavaScriptCore/b3/B3Value.h
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2015-2016 Apple Inc. All rights reserved.
+ * Copyright (C) 2015-2017 Apple Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -27,7 +27,7 @@
#if ENABLE(B3_JIT)
-#include "AirArg.h"
+#include "B3Bank.h"
#include "B3Effects.h"
#include "B3FrequentedBlock.h"
#include "B3Kind.h"
@@ -35,9 +35,11 @@
#include "B3SparseCollection.h"
#include "B3Type.h"
#include "B3ValueKey.h"
+#include "B3Width.h"
#include <wtf/CommaPrinter.h>
#include <wtf/FastMalloc.h>
#include <wtf/Noncopyable.h>
+#include <wtf/TriState.h>
namespace JSC { namespace B3 {
@@ -86,8 +88,8 @@
void setType(Type type) { m_type = type; }
// This is useful when lowering. Note that this is only valid for non-void values.
- Air::Arg::Type airType() const { return Air::Arg::typeForB3Type(type()); }
- Air::Arg::Width airWidth() const { return Air::Arg::widthForB3Type(type()); }
+ Bank resultBank() const { return bankForType(type()); }
+ Width resultWidth() const { return widthForType(type()); }
AdjacencyList& children() { return m_children; }
const AdjacencyList& children() const { return m_children; }
diff --git a/Source/JavaScriptCore/b3/B3Variable.h b/Source/JavaScriptCore/b3/B3Variable.h
index f4d610f..99c4385 100644
--- a/Source/JavaScriptCore/b3/B3Variable.h
+++ b/Source/JavaScriptCore/b3/B3Variable.h
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2016 Apple Inc. All rights reserved.
+ * Copyright (C) 2016-2017 Apple Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -27,8 +27,10 @@
#if ENABLE(B3_JIT)
+#include "B3Bank.h"
#include "B3SparseCollection.h"
#include "B3Type.h"
+#include "B3Width.h"
#include <wtf/FastMalloc.h>
#include <wtf/Noncopyable.h>
#include <wtf/PrintStream.h>
@@ -45,6 +47,8 @@
~Variable();
Type type() const { return m_type; }
+ Width width() const { return widthForType(type()); }
+ Bank bank() const { return bankForType(type()); }
unsigned index() const { return m_index; }
void dump(PrintStream&) const;
diff --git a/Source/JavaScriptCore/b3/B3WasmAddressValue.h b/Source/JavaScriptCore/b3/B3WasmAddressValue.h
index d938602..1a24c13 100644
--- a/Source/JavaScriptCore/b3/B3WasmAddressValue.h
+++ b/Source/JavaScriptCore/b3/B3WasmAddressValue.h
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2016 Apple Inc. All rights reserved.
+ * Copyright (C) 2016-2017 Apple Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -28,6 +28,7 @@
#if ENABLE(B3_JIT)
#include "B3Value.h"
+#include "GPRInfo.h"
namespace JSC { namespace B3 {
diff --git a/Source/JavaScriptCore/b3/B3Width.cpp b/Source/JavaScriptCore/b3/B3Width.cpp
new file mode 100644
index 0000000..c2fc017
--- /dev/null
+++ b/Source/JavaScriptCore/b3/B3Width.cpp
@@ -0,0 +1,58 @@
+/*
+ * Copyright (C) 2017 Apple Inc. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY APPLE INC. ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL APPLE INC. OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "config.h"
+#include "B3Width.h"
+
+#if ENABLE(B3_JIT)
+
+#include <wtf/PrintStream.h>
+
+namespace WTF {
+
+void printInternal(PrintStream& out, JSC::B3::Width width)
+{
+ switch (width) {
+ case JSC::B3::Width8:
+ out.print("8");
+ return;
+ case JSC::B3::Width16:
+ out.print("16");
+ return;
+ case JSC::B3::Width32:
+ out.print("32");
+ return;
+ case JSC::B3::Width64:
+ out.print("64");
+ return;
+ }
+
+ RELEASE_ASSERT_NOT_REACHED();
+}
+
+} // namespace WTF
+
+#endif // ENABLE(B3_JIT)
+
diff --git a/Source/JavaScriptCore/b3/B3Width.h b/Source/JavaScriptCore/b3/B3Width.h
new file mode 100644
index 0000000..b69a3916
--- /dev/null
+++ b/Source/JavaScriptCore/b3/B3Width.h
@@ -0,0 +1,107 @@
+/*
+ * Copyright (C) 2017 Apple Inc. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY APPLE INC. ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL APPLE INC. OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#pragma once
+
+#if ENABLE(B3_JIT)
+
+#include "B3Bank.h"
+#include "B3Type.h"
+
+namespace JSC { namespace B3 {
+
+enum Width : int8_t {
+ Width8,
+ Width16,
+ Width32,
+ Width64
+};
+
+inline Width pointerWidth()
+{
+ if (sizeof(void*) == 8)
+ return Width64;
+ return Width32;
+}
+
+inline Width widthForType(Type type)
+{
+ switch (type) {
+ case Void:
+ ASSERT_NOT_REACHED();
+ return Width8;
+ case Int32:
+ case Float:
+ return Width32;
+ case Int64:
+ case Double:
+ return Width64;
+ }
+ ASSERT_NOT_REACHED();
+}
+
+inline Width conservativeWidth(Bank bank)
+{
+ return bank == GP ? pointerWidth() : Width64;
+}
+
+inline Width minimumWidth(Bank bank)
+{
+ return bank == GP ? Width8 : Width32;
+}
+
+inline unsigned bytes(Width width)
+{
+ return 1 << width;
+}
+
+inline Width widthForBytes(unsigned bytes)
+{
+ switch (bytes) {
+ case 0:
+ case 1:
+ return Width8;
+ case 2:
+ return Width16;
+ case 3:
+ case 4:
+ return Width32;
+ default:
+ return Width64;
+ }
+}
+
+} } // namespace JSC::B3
+
+namespace WTF {
+
+class PrintStream;
+
+void printInternal(PrintStream&, JSC::B3::Width);
+
+} // namespace WTF
+
+#endif // ENABLE(B3_JIT)
+
diff --git a/Source/JavaScriptCore/b3/air/AirAllocateRegistersByGraphColoring.cpp b/Source/JavaScriptCore/b3/air/AirAllocateRegistersByGraphColoring.cpp
index 0677834..cbd46a2 100644
--- a/Source/JavaScriptCore/b3/air/AirAllocateRegistersByGraphColoring.cpp
+++ b/Source/JavaScriptCore/b3/air/AirAllocateRegistersByGraphColoring.cpp
@@ -48,7 +48,7 @@
bool reportStats = false;
// The AbstractColoringAllocator defines all the code that is independant
-// from the type or register and can be shared when allocating registers.
+// from the bank or register and can be shared when allocating registers.
template<typename IndexType, typename TmpMapper>
class AbstractColoringAllocator {
public:
@@ -1375,9 +1375,9 @@
};
// This perform all the tasks that are specific to certain register type.
-template<Arg::Type type, template<typename, typename> class AllocatorType>
-class ColoringAllocator : public AllocatorType<unsigned, AbsoluteTmpMapper<type>> {
- using TmpMapper = AbsoluteTmpMapper<type>;
+template<Bank bank, template<typename, typename> class AllocatorType>
+class ColoringAllocator : public AllocatorType<unsigned, AbsoluteTmpMapper<bank>> {
+ using TmpMapper = AbsoluteTmpMapper<bank>;
using Base = AllocatorType<unsigned, TmpMapper>;
using Base::m_isOnSelectStack;
using Base::m_selectStack;
@@ -1409,10 +1409,10 @@
public:
ColoringAllocator(Code& code, TmpWidth& tmpWidth, const UseCounts<Tmp>& useCounts, const HashSet<unsigned>& unspillableTmp)
- : Base(code, code.regsInPriorityOrder(type), TmpMapper::lastMachineRegisterIndex(), tmpArraySize(code), unspillableTmp, useCounts)
+ : Base(code, code.regsInPriorityOrder(bank), TmpMapper::lastMachineRegisterIndex(), tmpArraySize(code), unspillableTmp, useCounts)
, m_tmpWidth(tmpWidth)
{
- if (type == Arg::GP) {
+ if (bank == GP) {
m_framePointerIndex = TmpMapper::absoluteIndex(Tmp(MacroAssembler::framePointerRegister));
m_interferesWithFramePointer.ensureSize(tmpArraySize(code));
}
@@ -1512,7 +1512,7 @@
{
ASSERT(!tmp.isReg());
ASSERT(m_coloredTmp.size());
- ASSERT(tmp.isGP() == (type == Arg::GP));
+ ASSERT(tmp.isGP() == (bank == GP));
Reg reg = m_coloredTmp[TmpMapper::absoluteIndex(tmp)];
if (!reg) {
@@ -1527,7 +1527,7 @@
protected:
static unsigned tmpArraySize(Code& code)
{
- unsigned numTmps = code.numTmps(type);
+ unsigned numTmps = code.numTmps(bank);
return TmpMapper::absoluteIndex(numTmps);
}
@@ -1552,7 +1552,7 @@
if (leftTmp == rightTmp)
return false;
- if (leftTmp.isGP() != (type == Arg::GP) || rightTmp.isGP() != (type == Arg::GP))
+ if (leftTmp.isGP() != (bank == GP) || rightTmp.isGP() != (bank == GP))
return false;
unsigned leftIndex = TmpMapper::absoluteIndex(leftTmp);
@@ -1585,9 +1585,9 @@
m_coalescingCandidates.clear();
m_worklistMoves.clear();
- TmpLiveness<type> liveness(m_code);
+ TmpLiveness<bank> liveness(m_code);
for (BasicBlock* block : m_code) {
- typename TmpLiveness<type>::LocalCalc localCalc(liveness, block);
+ typename TmpLiveness<bank>::LocalCalc localCalc(liveness, block);
for (unsigned instIndex = block->size(); instIndex--;) {
Inst& inst = block->at(instIndex);
Inst* nextInst = block->get(instIndex + 1);
@@ -1599,15 +1599,15 @@
buildLowPriorityMoveList();
}
- void build(Inst* prevInst, Inst* nextInst, const typename TmpLiveness<type>::LocalCalc& localCalc)
+ void build(Inst* prevInst, Inst* nextInst, const typename TmpLiveness<bank>::LocalCalc& localCalc)
{
if (traceDebug)
dataLog("Building between ", pointerDump(prevInst), " and ", pointerDump(nextInst), ":\n");
Inst::forEachDefWithExtraClobberedRegs<Tmp>(
prevInst, nextInst,
- [&] (const Tmp& arg, Arg::Role, Arg::Type argType, Arg::Width) {
- if (argType != type)
+ [&] (const Tmp& arg, Arg::Role, Bank argBank, Width) {
+ if (argBank != bank)
return;
// All the Def()s interfere with each other and with all the extra clobbered Tmps.
@@ -1615,8 +1615,8 @@
// do not need interference edges in our implementation.
Inst::forEachDef<Tmp>(
prevInst, nextInst,
- [&] (Tmp& otherArg, Arg::Role, Arg::Type argType, Arg::Width) {
- if (argType != type)
+ [&] (Tmp& otherArg, Arg::Role, Bank argBank, Width) {
+ if (argBank != bank)
return;
if (traceDebug)
@@ -1631,7 +1631,7 @@
// coalesce the Move even if the two Tmp never interfere anywhere.
Tmp defTmp;
Tmp useTmp;
- prevInst->forEachTmp([&defTmp, &useTmp] (Tmp& argTmp, Arg::Role role, Arg::Type, Arg::Width) {
+ prevInst->forEachTmp([&defTmp, &useTmp] (Tmp& argTmp, Arg::Role role, Bank, Width) {
if (Arg::isLateDef(role))
defTmp = argTmp;
else {
@@ -1695,17 +1695,17 @@
}
}
- void addEdges(Inst* prevInst, Inst* nextInst, typename TmpLiveness<type>::LocalCalc::Iterable liveTmps)
+ void addEdges(Inst* prevInst, Inst* nextInst, typename TmpLiveness<bank>::LocalCalc::Iterable liveTmps)
{
// All the Def()s interfere with everthing live.
Inst::forEachDefWithExtraClobberedRegs<Tmp>(
prevInst, nextInst,
- [&] (const Tmp& arg, Arg::Role, Arg::Type argType, Arg::Width) {
- if (argType != type)
+ [&] (const Tmp& arg, Arg::Role, Bank argBank, Width) {
+ if (argBank != bank)
return;
for (const Tmp& liveTmp : liveTmps) {
- ASSERT(liveTmp.isGP() == (type == Arg::GP));
+ ASSERT(liveTmp.isGP() == (bank == GP));
if (traceDebug)
dataLog(" Adding def-live edge: ", arg, ", ", liveTmp, "\n");
@@ -1713,7 +1713,7 @@
addEdge(arg, liveTmp);
}
- if (type == Arg::GP && !arg.isGPR())
+ if (bank == GP && !arg.isGPR())
m_interferesWithFramePointer.quickSet(TmpMapper::absoluteIndex(arg));
});
}
@@ -1729,8 +1729,8 @@
// that Move32's are not coalescable.
static bool mayBeCoalescableImpl(const Inst& inst, TmpWidth* tmpWidth)
{
- switch (type) {
- case Arg::GP:
+ switch (bank) {
+ case GP:
switch (inst.kind.opcode) {
case Move:
case Move32:
@@ -1739,7 +1739,7 @@
return false;
}
break;
- case Arg::FP:
+ case FP:
switch (inst.kind.opcode) {
case MoveFloat:
case MoveDouble:
@@ -1755,8 +1755,8 @@
if (!inst.args[0].isTmp() || !inst.args[1].isTmp())
return false;
- ASSERT(inst.args[0].type() == type);
- ASSERT(inst.args[1].type() == type);
+ ASSERT(inst.args[0].bank() == bank);
+ ASSERT(inst.args[1].bank() == bank);
// We can coalesce a Move32 so long as either of the following holds:
// - The input is already zero-filled.
@@ -1769,8 +1769,8 @@
if (!tmpWidth)
return false;
- if (tmpWidth->defWidth(inst.args[0].tmp()) > Arg::Width32
- && tmpWidth->useWidth(inst.args[1].tmp()) > Arg::Width32)
+ if (tmpWidth->defWidth(inst.args[0].tmp()) > Width32
+ && tmpWidth->useWidth(inst.args[1].tmp()) > Width32)
return false;
}
@@ -1792,9 +1792,9 @@
{
padInterference(m_code);
- allocateOnType<Arg::GP>();
+ allocateOnBank<GP>();
m_numIterations = 0;
- allocateOnType<Arg::FP>();
+ allocateOnBank<FP>();
fixSpillsAfterTerminals();
@@ -1803,10 +1803,10 @@
}
private:
- template<Arg::Type type>
- void allocateOnType()
+ template<Bank bank>
+ void allocateOnBank()
{
- HashSet<unsigned> unspillableTmps = computeUnspillableTmps<type>();
+ HashSet<unsigned> unspillableTmps = computeUnspillableTmps<bank>();
// FIXME: If a Tmp is used only from a Scratch role and that argument is !admitsStack, then
// we should add the Tmp to unspillableTmps. That will help avoid relooping only to turn the
@@ -1837,23 +1837,23 @@
auto doAllocation = [&] (auto& allocator) -> bool {
allocator.allocate();
if (!allocator.requiresSpilling()) {
- this->assignRegistersToTmp<type>(allocator);
+ this->assignRegistersToTmp<bank>(allocator);
if (traceDebug)
dataLog("Successfull allocation at iteration ", m_numIterations, ":\n", m_code);
return true;
}
- this->addSpillAndFill<type>(allocator, unspillableTmps);
+ this->addSpillAndFill<bank>(allocator, unspillableTmps);
return false;
};
bool done;
if ((isARM64() || Options::airForceBriggsAllocator()) && !Options::airForceIRCAllocator()) {
- ColoringAllocator<type, Briggs> allocator(m_code, m_tmpWidth, m_useCounts, unspillableTmps);
+ ColoringAllocator<bank, Briggs> allocator(m_code, m_tmpWidth, m_useCounts, unspillableTmps);
done = doAllocation(allocator);
} else {
- ColoringAllocator<type, IRC> allocator(m_code, m_tmpWidth, m_useCounts, unspillableTmps);
+ ColoringAllocator<bank, IRC> allocator(m_code, m_tmpWidth, m_useCounts, unspillableTmps);
done = doAllocation(allocator);
}
if (done)
@@ -1861,7 +1861,7 @@
}
}
- template<Arg::Type type>
+ template<Bank bank>
HashSet<unsigned> computeUnspillableTmps()
{
@@ -1874,8 +1874,8 @@
unsigned admitStackCount { 0 };
};
- unsigned numTmps = m_code.numTmps(type);
- unsigned arraySize = AbsoluteTmpMapper<type>::absoluteIndex(numTmps);
+ unsigned numTmps = m_code.numTmps(bank);
+ unsigned arraySize = AbsoluteTmpMapper<bank>::absoluteIndex(numTmps);
Vector<Range, 0, UnsafeVectorOverflow> ranges;
ranges.fill(Range(), arraySize);
@@ -1883,13 +1883,13 @@
unsigned globalIndex = 0;
for (BasicBlock* block : m_code) {
for (Inst& inst : *block) {
- inst.forEachArg([&] (Arg& arg, Arg::Role, Arg::Type argType, Arg::Width) {
+ inst.forEachArg([&] (Arg& arg, Arg::Role, Bank argBank, Width) {
if (arg.isTmp() && inst.admitsStack(arg)) {
- if (argType != type)
+ if (argBank != bank)
return;
Tmp tmp = arg.tmp();
- Range& range = ranges[AbsoluteTmpMapper<type>::absoluteIndex(tmp)];
+ Range& range = ranges[AbsoluteTmpMapper<bank>::absoluteIndex(tmp)];
range.count++;
range.admitStackCount++;
if (globalIndex < range.first) {
@@ -1902,10 +1902,10 @@
}
arg.forEachTmpFast([&] (Tmp& tmp) {
- if (tmp.isGP() != (type == Arg::GP))
+ if (tmp.isGP() != (bank == GP))
return;
- Range& range = ranges[AbsoluteTmpMapper<type>::absoluteIndex(tmp)];
+ Range& range = ranges[AbsoluteTmpMapper<bank>::absoluteIndex(tmp)];
range.count++;
if (globalIndex < range.first) {
range.first = globalIndex;
@@ -1919,7 +1919,7 @@
}
++globalIndex;
}
- for (unsigned i = AbsoluteTmpMapper<type>::lastMachineRegisterIndex() + 1; i < ranges.size(); ++i) {
+ for (unsigned i = AbsoluteTmpMapper<bank>::lastMachineRegisterIndex() + 1; i < ranges.size(); ++i) {
Range& range = ranges[i];
if (range.last - range.first <= 1 && range.count > range.admitStackCount)
unspillableTmps.add(i);
@@ -1928,7 +1928,7 @@
return unspillableTmps;
}
- template<Arg::Type type, typename AllocatorType>
+ template<Bank bank, typename AllocatorType>
void assignRegistersToTmp(const AllocatorType& allocator)
{
for (BasicBlock* block : m_code) {
@@ -1944,15 +1944,15 @@
// equivalent if the destination's high bits are not observable or if the source's high
// bits are all zero. Note that we don't have the opposite optimization for other
// architectures, which may prefer Move over Move32, because Move is canonical already.
- if (type == Arg::GP && inst.kind.opcode == Move
+ if (bank == GP && inst.kind.opcode == Move
&& inst.args[0].isTmp() && inst.args[1].isTmp()) {
- if (m_tmpWidth.useWidth(inst.args[1].tmp()) <= Arg::Width32
- || m_tmpWidth.defWidth(inst.args[0].tmp()) <= Arg::Width32)
+ if (m_tmpWidth.useWidth(inst.args[1].tmp()) <= Width32
+ || m_tmpWidth.defWidth(inst.args[0].tmp()) <= Width32)
inst.kind.opcode = Move32;
}
inst.forEachTmpFast([&] (Tmp& tmp) {
- if (tmp.isReg() || tmp.isGP() == (type != Arg::GP))
+ if (tmp.isReg() || tmp.isGP() == (bank != GP))
return;
Tmp aliasTmp = allocator.getAlias(tmp);
@@ -1980,18 +1980,18 @@
}
}
- static unsigned stackSlotMinimumWidth(Arg::Width width)
+ static unsigned stackSlotMinimumWidth(Width width)
{
- return width <= Arg::Width32 ? 4 : 8;
+ return width <= Width32 ? 4 : 8;
}
- template<Arg::Type type, typename AllocatorType>
+ template<Bank bank, typename AllocatorType>
void addSpillAndFill(const AllocatorType& allocator, HashSet<unsigned>& unspillableTmps)
{
HashMap<Tmp, StackSlot*> stackSlots;
for (Tmp tmp : allocator.spilledTmps()) {
// All the spilled values become unspillable.
- unspillableTmps.add(AbsoluteTmpMapper<type>::absoluteIndex(tmp));
+ unspillableTmps.add(AbsoluteTmpMapper<bank>::absoluteIndex(tmp));
// Allocate stack slot for each spilled value.
StackSlot* stackSlot = m_code.addStackSlot(
@@ -2015,18 +2015,18 @@
// Move is the canonical way to move data between GPRs.
bool canUseMove32IfDidSpill = false;
bool didSpill = false;
- if (type == Arg::GP && inst.kind.opcode == Move) {
- if ((inst.args[0].isTmp() && m_tmpWidth.width(inst.args[0].tmp()) <= Arg::Width32)
- || (inst.args[1].isTmp() && m_tmpWidth.width(inst.args[1].tmp()) <= Arg::Width32))
+ if (bank == GP && inst.kind.opcode == Move) {
+ if ((inst.args[0].isTmp() && m_tmpWidth.width(inst.args[0].tmp()) <= Width32)
+ || (inst.args[1].isTmp() && m_tmpWidth.width(inst.args[1].tmp()) <= Width32))
canUseMove32IfDidSpill = true;
}
// Try to replace the register use by memory use when possible.
inst.forEachArg(
- [&] (Arg& arg, Arg::Role role, Arg::Type argType, Arg::Width width) {
+ [&] (Arg& arg, Arg::Role role, Bank argBank, Width width) {
if (!arg.isTmp())
return;
- if (argType != type)
+ if (argBank != bank)
return;
if (arg.isReg())
return;
@@ -2047,16 +2047,16 @@
return;
}
- Arg::Width spillWidth = m_tmpWidth.requiredWidth(arg.tmp());
+ Width spillWidth = m_tmpWidth.requiredWidth(arg.tmp());
if (Arg::isAnyDef(role) && width < spillWidth)
return;
ASSERT(inst.kind.opcode == Move || !(Arg::isAnyUse(role) && width > spillWidth));
- if (spillWidth != Arg::Width32)
+ if (spillWidth != Width32)
canUseMove32IfDidSpill = false;
stackSlotEntry->value->ensureSize(
- canUseMove32IfDidSpill ? 4 : Arg::bytes(width));
+ canUseMove32IfDidSpill ? 4 : bytes(width));
arg = Arg::stack(stackSlotEntry->value);
didSpill = true;
});
@@ -2065,8 +2065,8 @@
inst.kind.opcode = Move32;
// For every other case, add Load/Store as needed.
- inst.forEachTmp([&] (Tmp& tmp, Arg::Role role, Arg::Type argType, Arg::Width) {
- if (tmp.isReg() || argType != type)
+ inst.forEachTmp([&] (Tmp& tmp, Arg::Role role, Bank argBank, Width) {
+ if (tmp.isReg() || argBank != bank)
return;
auto stackSlotEntry = stackSlots.find(tmp);
@@ -2079,22 +2079,22 @@
return;
}
- Arg::Width spillWidth = m_tmpWidth.requiredWidth(tmp);
+ Width spillWidth = m_tmpWidth.requiredWidth(tmp);
Opcode move = Oops;
switch (stackSlotMinimumWidth(spillWidth)) {
case 4:
- move = type == Arg::GP ? Move32 : MoveFloat;
+ move = bank == GP ? Move32 : MoveFloat;
break;
case 8:
- move = type == Arg::GP ? Move : MoveDouble;
+ move = bank == GP ? Move : MoveDouble;
break;
default:
RELEASE_ASSERT_NOT_REACHED();
break;
}
- tmp = m_code.newTmp(type);
- unspillableTmps.add(AbsoluteTmpMapper<type>::absoluteIndex(tmp));
+ tmp = m_code.newTmp(bank);
+ unspillableTmps.add(AbsoluteTmpMapper<bank>::absoluteIndex(tmp));
Arg arg = Arg::stack(stackSlotEntry->value);
if (Arg::isAnyUse(role) && role != Arg::Scratch)
diff --git a/Source/JavaScriptCore/b3/air/AirAllocateStack.cpp b/Source/JavaScriptCore/b3/air/AirAllocateStack.cpp
index de9297f..69adcd3 100644
--- a/Source/JavaScriptCore/b3/air/AirAllocateStack.cpp
+++ b/Source/JavaScriptCore/b3/air/AirAllocateStack.cpp
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2015-2016 Apple Inc. All rights reserved.
+ * Copyright (C) 2015-2017 Apple Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -134,7 +134,7 @@
Inst::forEachDef<Arg>(
block->get(instIndex), block->get(instIndex + 1),
- [&] (Arg& arg, Arg::Role, Arg::Type, Arg::Width) {
+ [&] (Arg& arg, Arg::Role, Bank, Width) {
if (!arg.isStack())
return;
StackSlot* slot = arg.stackSlot();
@@ -159,7 +159,7 @@
if (!inst.hasNonArgEffects()) {
bool ok = true;
inst.forEachArg(
- [&] (Arg& arg, Arg::Role role, Arg::Type, Arg::Width) {
+ [&] (Arg& arg, Arg::Role role, Bank, Width) {
if (Arg::isEarlyDef(role)) {
ok = false;
return;
@@ -262,7 +262,7 @@
for (unsigned instIndex = 0; instIndex < block->size(); ++instIndex) {
Inst& inst = block->at(instIndex);
inst.forEachArg(
- [&] (Arg& arg, Arg::Role role, Arg::Type, Arg::Width width) {
+ [&] (Arg& arg, Arg::Role role, Bank, Width width) {
auto stackAddr = [&] (int32_t offset) -> Arg {
return Arg::stackAddr(offset, code.frameSize(), width);
};
@@ -272,13 +272,13 @@
StackSlot* slot = arg.stackSlot();
if (Arg::isZDef(role)
&& slot->kind() == StackSlotKind::Spill
- && slot->byteSize() > Arg::bytes(width)) {
+ && slot->byteSize() > bytes(width)) {
// Currently we only handle this simple case because it's the only one
// that arises: ZDef's are only 32-bit right now. So, when we hit these
// assertions it means that we need to implement those other kinds of
// zero fills.
RELEASE_ASSERT(slot->byteSize() == 8);
- RELEASE_ASSERT(width == Arg::Width32);
+ RELEASE_ASSERT(width == Width32);
RELEASE_ASSERT(isValidForm(StoreZero32, Arg::Stack));
insertionSet.insert(
diff --git a/Source/JavaScriptCore/b3/air/AirArg.cpp b/Source/JavaScriptCore/b3/air/AirArg.cpp
index c777928..c635944 100644
--- a/Source/JavaScriptCore/b3/air/AirArg.cpp
+++ b/Source/JavaScriptCore/b3/air/AirArg.cpp
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2015-2016 Apple Inc. All rights reserved.
+ * Copyright (C) 2015-2017 Apple Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -73,15 +73,15 @@
bool Arg::canRepresent(Value* value) const
{
- return isType(typeForB3Type(value->type()));
+ return isBank(bankForType(value->type()));
}
-bool Arg::isCompatibleType(const Arg& other) const
+bool Arg::isCompatibleBank(const Arg& other) const
{
- if (hasType())
- return other.isType(type());
- if (other.hasType())
- return isType(other.type());
+ if (hasBank())
+ return other.isBank(bank());
+ if (other.hasBank())
+ return isBank(other.bank());
return true;
}
@@ -293,40 +293,6 @@
RELEASE_ASSERT_NOT_REACHED();
}
-void printInternal(PrintStream& out, Arg::Type type)
-{
- switch (type) {
- case Arg::GP:
- out.print("GP");
- return;
- case Arg::FP:
- out.print("FP");
- return;
- }
-
- RELEASE_ASSERT_NOT_REACHED();
-}
-
-void printInternal(PrintStream& out, Arg::Width width)
-{
- switch (width) {
- case Arg::Width8:
- out.print("8");
- return;
- case Arg::Width16:
- out.print("16");
- return;
- case Arg::Width32:
- out.print("32");
- return;
- case Arg::Width64:
- out.print("64");
- return;
- }
-
- RELEASE_ASSERT_NOT_REACHED();
-}
-
void printInternal(PrintStream& out, Arg::Signedness signedness)
{
switch (signedness) {
diff --git a/Source/JavaScriptCore/b3/air/AirArg.h b/Source/JavaScriptCore/b3/air/AirArg.h
index 13db1ce..1e30440 100644
--- a/Source/JavaScriptCore/b3/air/AirArg.h
+++ b/Source/JavaScriptCore/b3/air/AirArg.h
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2015-2016 Apple Inc. All rights reserved.
+ * Copyright (C) 2015-2017 Apple Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -28,8 +28,10 @@
#if ENABLE(B3_JIT)
#include "AirTmp.h"
+#include "B3Bank.h"
#include "B3Common.h"
#include "B3Type.h"
+#include "B3Width.h"
#include <wtf/Optional.h>
#if COMPILER(GCC) && ASSERT_DISABLED
@@ -162,34 +164,6 @@
UseAddr
};
- enum Type : int8_t {
- GP,
- FP
- };
-
- static const unsigned numTypes = 2;
-
- template<typename Functor>
- static void forEachType(const Functor& functor)
- {
- functor(GP);
- functor(FP);
- }
-
- enum Width : int8_t {
- Width8,
- Width16,
- Width32,
- Width64
- };
-
- static Width pointerWidth()
- {
- if (sizeof(void*) == 8)
- return Width64;
- return Width32;
- }
-
enum Signedness : int8_t {
Signed,
Unsigned
@@ -389,70 +363,6 @@
ASSERT_NOT_REACHED();
}
- static Type typeForB3Type(B3::Type type)
- {
- switch (type) {
- case Void:
- ASSERT_NOT_REACHED();
- return GP;
- case Int32:
- case Int64:
- return GP;
- case Float:
- case Double:
- return FP;
- }
- ASSERT_NOT_REACHED();
- return GP;
- }
-
- static Width widthForB3Type(B3::Type type)
- {
- switch (type) {
- case Void:
- ASSERT_NOT_REACHED();
- return Width8;
- case Int32:
- case Float:
- return Width32;
- case Int64:
- case Double:
- return Width64;
- }
- ASSERT_NOT_REACHED();
- }
-
- static Width conservativeWidth(Type type)
- {
- return type == GP ? pointerWidth() : Width64;
- }
-
- static Width minimumWidth(Type type)
- {
- return type == GP ? Width8 : Width32;
- }
-
- static unsigned bytes(Width width)
- {
- return 1 << width;
- }
-
- static Width widthForBytes(unsigned bytes)
- {
- switch (bytes) {
- case 0:
- case 1:
- return Width8;
- case 2:
- return Width16;
- case 3:
- case 4:
- return Width32;
- default:
- return Width64;
- }
- }
-
Arg()
: m_kind(Invalid)
{
@@ -978,7 +888,7 @@
ASSERT_NOT_REACHED();
}
- bool hasType() const
+ bool hasBank() const
{
switch (kind()) {
case Imm:
@@ -993,14 +903,14 @@
}
// The type is ambiguous for some arg kinds. Call with care.
- Type type() const
+ Bank bank() const
{
return isGP() ? GP : FP;
}
- bool isType(Type type) const
+ bool isBank(Bank bank) const
{
- switch (type) {
+ switch (bank) {
case GP:
return isGP();
case FP:
@@ -1011,7 +921,7 @@
bool canRepresent(Value* value) const;
- bool isCompatibleType(const Arg& other) const;
+ bool isCompatibleBank(const Arg& other) const;
bool isGPR() const
{
@@ -1184,7 +1094,7 @@
void forEachFast(const Functor&);
template<typename Thing, typename Functor>
- void forEach(Role, Type, Width, const Functor&);
+ void forEach(Role, Bank, Width, const Functor&);
// This is smart enough to know that an address arg in a Def or UseDef rule will use its
// tmps and never def them. For example, this:
@@ -1193,12 +1103,12 @@
//
// This defs (%rcx) but uses %rcx.
template<typename Functor>
- void forEachTmp(Role argRole, Type argType, Width argWidth, const Functor& functor)
+ void forEachTmp(Role argRole, Bank argBank, Width argWidth, const Functor& functor)
{
switch (m_kind) {
case Tmp:
ASSERT(isAnyUse(argRole) || isAnyDef(argRole));
- functor(m_base, argRole, argType, argWidth);
+ functor(m_base, argRole, argBank, argWidth);
break;
case Addr:
functor(m_base, Use, GP, argRole == UseAddr ? argWidth : pointerWidth());
@@ -1359,8 +1269,6 @@
JS_EXPORT_PRIVATE void printInternal(PrintStream&, JSC::B3::Air::Arg::Kind);
JS_EXPORT_PRIVATE void printInternal(PrintStream&, JSC::B3::Air::Arg::Role);
-JS_EXPORT_PRIVATE void printInternal(PrintStream&, JSC::B3::Air::Arg::Type);
-JS_EXPORT_PRIVATE void printInternal(PrintStream&, JSC::B3::Air::Arg::Width);
JS_EXPORT_PRIVATE void printInternal(PrintStream&, JSC::B3::Air::Arg::Signedness);
template<typename T> struct DefaultHash;
diff --git a/Source/JavaScriptCore/b3/air/AirArgInlines.h b/Source/JavaScriptCore/b3/air/AirArgInlines.h
index 73f7d5b..9efac4e 100644
--- a/Source/JavaScriptCore/b3/air/AirArgInlines.h
+++ b/Source/JavaScriptCore/b3/air/AirArgInlines.h
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2016 Apple Inc. All rights reserved.
+ * Copyright (C) 2016-2017 Apple Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -53,9 +53,9 @@
}
template<typename Functor>
- static void forEach(Arg& arg, Arg::Role role, Arg::Type type, Arg::Width width, const Functor& functor)
+ static void forEach(Arg& arg, Arg::Role role, Bank bank, Width width, const Functor& functor)
{
- arg.forEachTmp(role, type, width, functor);
+ arg.forEachTmp(role, bank, width, functor);
}
};
@@ -77,9 +77,9 @@
}
template<typename Functor>
- static void forEach(Arg& arg, Arg::Role role, Arg::Type type, Arg::Width width, const Functor& functor)
+ static void forEach(Arg& arg, Arg::Role role, Bank bank, Width width, const Functor& functor)
{
- functor(arg, role, type, width);
+ functor(arg, role, bank, width);
}
};
@@ -106,7 +106,7 @@
}
template<typename Functor>
- static void forEach(Arg& arg, Arg::Role role, Arg::Type type, Arg::Width width, const Functor& functor)
+ static void forEach(Arg& arg, Arg::Role role, Bank bank, Width width, const Functor& functor)
{
if (!arg.isStack())
return;
@@ -119,7 +119,7 @@
// semantics of "Anonymous".
// https://bugs.webkit.org/show_bug.cgi?id=151128
- functor(stackSlot, role, type, width);
+ functor(stackSlot, role, bank, width);
arg = Arg::stack(stackSlot, arg.offset());
}
};
@@ -150,16 +150,16 @@
}
template<typename Functor>
- static void forEach(Arg& arg, Arg::Role argRole, Arg::Type argType, Arg::Width argWidth, const Functor& functor)
+ static void forEach(Arg& arg, Arg::Role argRole, Bank argBank, Width argWidth, const Functor& functor)
{
arg.forEachTmp(
- argRole, argType, argWidth,
- [&] (Tmp& tmp, Arg::Role role, Arg::Type type, Arg::Width width) {
+ argRole, argBank, argWidth,
+ [&] (Tmp& tmp, Arg::Role role, Bank bank, Width width) {
if (!tmp.isReg())
return;
Reg reg = tmp.reg();
- functor(reg, role, type, width);
+ functor(reg, role, bank, width);
tmp = Tmp(reg);
});
}
@@ -184,9 +184,9 @@
}
template<typename Thing, typename Functor>
-void Arg::forEach(Role role, Type type, Width width, const Functor& functor)
+void Arg::forEach(Role role, Bank bank, Width width, const Functor& functor)
{
- ArgThingHelper<Thing>::forEach(*this, role, type, width, functor);
+ ArgThingHelper<Thing>::forEach(*this, role, bank, width, functor);
}
} } } // namespace JSC::B3::Air
diff --git a/Source/JavaScriptCore/b3/air/AirCCallSpecial.cpp b/Source/JavaScriptCore/b3/air/AirCCallSpecial.cpp
index f1b6d71..0c803cd 100644
--- a/Source/JavaScriptCore/b3/air/AirCCallSpecial.cpp
+++ b/Source/JavaScriptCore/b3/air/AirCCallSpecial.cpp
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2015 Apple Inc. All rights reserved.
+ * Copyright (C) 2015-2017 Apple Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -48,17 +48,17 @@
void CCallSpecial::forEachArg(Inst& inst, const ScopedLambda<Inst::EachArgCallback>& callback)
{
for (unsigned i = 0; i < numCalleeArgs; ++i)
- callback(inst.args[calleeArgOffset + i], Arg::Use, Arg::GP, Arg::pointerWidth());
+ callback(inst.args[calleeArgOffset + i], Arg::Use, GP, pointerWidth());
for (unsigned i = 0; i < numReturnGPArgs; ++i)
- callback(inst.args[returnGPArgOffset + i], Arg::Def, Arg::GP, Arg::pointerWidth());
+ callback(inst.args[returnGPArgOffset + i], Arg::Def, GP, pointerWidth());
for (unsigned i = 0; i < numReturnFPArgs; ++i)
- callback(inst.args[returnFPArgOffset + i], Arg::Def, Arg::FP, Arg::Width64);
+ callback(inst.args[returnFPArgOffset + i], Arg::Def, FP, Width64);
for (unsigned i = argArgOffset; i < inst.args.size(); ++i) {
- // For the type, we can just query the arg's type. The arg will have a type, because we
+ // For the type, we can just query the arg's bank. The arg will have a bank, because we
// require these args to be argument registers.
- Arg::Type type = inst.args[i].type();
- callback(inst.args[i], Arg::Use, type, Arg::conservativeWidth(type));
+ Bank bank = inst.args[i].bank();
+ callback(inst.args[i], Arg::Use, bank, conservativeWidth(bank));
}
}
diff --git a/Source/JavaScriptCore/b3/air/AirCCallingConvention.cpp b/Source/JavaScriptCore/b3/air/AirCCallingConvention.cpp
index 2b6f733..0abe1b3 100644
--- a/Source/JavaScriptCore/b3/air/AirCCallingConvention.cpp
+++ b/Source/JavaScriptCore/b3/air/AirCCallingConvention.cpp
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2016 Apple Inc. All rights reserved.
+ * Copyright (C) 2016-2017 Apple Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -62,10 +62,10 @@
Arg marshallCCallArgument(
unsigned& gpArgumentCount, unsigned& fpArgumentCount, unsigned& stackOffset, Value* child)
{
- switch (Arg::typeForB3Type(child->type())) {
- case Arg::GP:
+ switch (bankForType(child->type())) {
+ case GP:
return marshallCCallArgumentImpl<GPRInfo>(gpArgumentCount, stackOffset, child);
- case Arg::FP:
+ case FP:
return marshallCCallArgumentImpl<FPRInfo>(fpArgumentCount, stackOffset, child);
}
RELEASE_ASSERT_NOT_REACHED();
diff --git a/Source/JavaScriptCore/b3/air/AirCode.cpp b/Source/JavaScriptCore/b3/air/AirCode.cpp
index 79e2c0c..f5d3e9b 100644
--- a/Source/JavaScriptCore/b3/air/AirCode.cpp
+++ b/Source/JavaScriptCore/b3/air/AirCode.cpp
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2015-2016 Apple Inc. All rights reserved.
+ * Copyright (C) 2015-2017 Apple Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -41,10 +41,10 @@
, m_lastPhaseName("initial")
{
// Come up with initial orderings of registers. The user may replace this with something else.
- Arg::forEachType(
- [&] (Arg::Type type) {
+ forEachBank(
+ [&] (Bank bank) {
Vector<Reg> result;
- RegisterSet all = type == Arg::GP ? RegisterSet::allGPRs() : RegisterSet::allFPRs();
+ RegisterSet all = bank == GP ? RegisterSet::allGPRs() : RegisterSet::allFPRs();
all.exclude(RegisterSet::stackRegisters());
all.exclude(RegisterSet::reservedHardwareRegisters());
RegisterSet calleeSave = RegisterSet::calleeSaveRegisters();
@@ -58,7 +58,7 @@
if (calleeSave.get(reg))
result.append(reg);
});
- setRegsInPriorityOrder(type, result);
+ setRegsInPriorityOrder(bank, result);
});
}
@@ -66,20 +66,20 @@
{
}
-void Code::setRegsInPriorityOrder(Arg::Type type, const Vector<Reg>& regs)
+void Code::setRegsInPriorityOrder(Bank bank, const Vector<Reg>& regs)
{
- regsInPriorityOrderImpl(type) = regs;
+ regsInPriorityOrderImpl(bank) = regs;
m_mutableRegs = RegisterSet();
- Arg::forEachType(
- [&] (Arg::Type type) {
- for (Reg reg : regsInPriorityOrder(type))
+ forEachBank(
+ [&] (Bank bank) {
+ for (Reg reg : regsInPriorityOrder(bank))
m_mutableRegs.set(reg);
});
}
void Code::pinRegister(Reg reg)
{
- Vector<Reg>& regs = regsInPriorityOrderImpl(Arg(Tmp(reg)).type());
+ Vector<Reg>& regs = regsInPriorityOrderImpl(Arg(Tmp(reg)).bank());
regs.removeFirst(reg);
m_mutableRegs.clear(reg);
ASSERT(!regs.contains(reg));
diff --git a/Source/JavaScriptCore/b3/air/AirCode.h b/Source/JavaScriptCore/b3/air/AirCode.h
index f0e1eef..6b758b9 100644
--- a/Source/JavaScriptCore/b3/air/AirCode.h
+++ b/Source/JavaScriptCore/b3/air/AirCode.h
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2015-2016 Apple Inc. All rights reserved.
+ * Copyright (C) 2015-2017 Apple Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -69,18 +69,18 @@
Procedure& proc() { return m_proc; }
- const Vector<Reg>& regsInPriorityOrder(Arg::Type type) const
+ const Vector<Reg>& regsInPriorityOrder(Bank bank) const
{
- switch (type) {
- case Arg::GP:
+ switch (bank) {
+ case GP:
return m_gpRegsInPriorityOrder;
- case Arg::FP:
+ case FP:
return m_fpRegsInPriorityOrder;
}
ASSERT_NOT_REACHED();
}
- void setRegsInPriorityOrder(Arg::Type, const Vector<Reg>&);
+ void setRegsInPriorityOrder(Bank, const Vector<Reg>&);
// This is the set of registers that Air is allowed to emit code to mutate. It's derived from
// regsInPriorityOrder. Any registers not in this set are said to be "pinned".
@@ -104,23 +104,23 @@
// This is the special you need to make a C call!
CCallSpecial* cCallSpecial();
- Tmp newTmp(Arg::Type type)
+ Tmp newTmp(Bank bank)
{
- switch (type) {
- case Arg::GP:
+ switch (bank) {
+ case GP:
return Tmp::gpTmpForIndex(m_numGPTmps++);
- case Arg::FP:
+ case FP:
return Tmp::fpTmpForIndex(m_numFPTmps++);
}
ASSERT_NOT_REACHED();
}
- unsigned numTmps(Arg::Type type)
+ unsigned numTmps(Bank bank)
{
- switch (type) {
- case Arg::GP:
+ switch (bank) {
+ case GP:
return m_numGPTmps;
- case Arg::FP:
+ case FP:
return m_numFPTmps;
}
ASSERT_NOT_REACHED();
@@ -286,12 +286,12 @@
Code(Procedure&);
- Vector<Reg>& regsInPriorityOrderImpl(Arg::Type type)
+ Vector<Reg>& regsInPriorityOrderImpl(Bank bank)
{
- switch (type) {
- case Arg::GP:
+ switch (bank) {
+ case GP:
return m_gpRegsInPriorityOrder;
- case Arg::FP:
+ case FP:
return m_fpRegsInPriorityOrder;
}
ASSERT_NOT_REACHED();
diff --git a/Source/JavaScriptCore/b3/air/AirCustom.cpp b/Source/JavaScriptCore/b3/air/AirCustom.cpp
index 2a2df2f..7ee7f3c 100644
--- a/Source/JavaScriptCore/b3/air/AirCustom.cpp
+++ b/Source/JavaScriptCore/b3/air/AirCustom.cpp
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2016 Apple Inc. All rights reserved.
+ * Copyright (C) 2016-2017 Apple Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -46,7 +46,7 @@
RegisterSet clobberedLate = inst.extraClobberedRegs();
bool ok = true;
inst.forEachTmp(
- [&] (Tmp& tmp, Arg::Role role, Arg::Type, Arg::Width) {
+ [&] (Tmp& tmp, Arg::Role role, Bank, Width) {
if (!tmp.isReg())
return;
if (Arg::isLateDef(role) || Arg::isLateUse(role))
@@ -138,7 +138,7 @@
if (arg.isSomeImm())
continue;
- if (!arg.isCompatibleType(inst.args[i + 1]))
+ if (!arg.isCompatibleBank(inst.args[i + 1]))
return false;
} else {
ASSERT(mode == 1);
diff --git a/Source/JavaScriptCore/b3/air/AirCustom.h b/Source/JavaScriptCore/b3/air/AirCustom.h
index cddc038..faf000d 100644
--- a/Source/JavaScriptCore/b3/air/AirCustom.h
+++ b/Source/JavaScriptCore/b3/air/AirCustom.h
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2016 Apple Inc. All rights reserved.
+ * Copyright (C) 2016-2017 Apple Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -62,7 +62,7 @@
{
// This is basically bogus, but it works for analyses that model Special as an
// immediate.
- functor(inst.args[0], Arg::Use, Arg::GP, Arg::pointerWidth());
+ functor(inst.args[0], Arg::Use, GP, pointerWidth());
inst.args[0].special()->forEachArg(inst, scopedLambda<Inst::EachArgCallback>(functor));
}
@@ -128,21 +128,21 @@
unsigned index = 0;
- functor(inst.args[index++], Arg::Use, Arg::GP, Arg::pointerWidth()); // callee
+ functor(inst.args[index++], Arg::Use, GP, pointerWidth()); // callee
if (value->type() != Void) {
functor(
inst.args[index++], Arg::Def,
- Arg::typeForB3Type(value->type()),
- Arg::widthForB3Type(value->type()));
+ bankForType(value->type()),
+ widthForType(value->type()));
}
for (unsigned i = 1; i < value->numChildren(); ++i) {
Value* child = value->child(i);
functor(
inst.args[index++], Arg::Use,
- Arg::typeForB3Type(child->type()),
- Arg::widthForB3Type(child->type()));
+ bankForType(child->type()),
+ widthForType(child->type()));
}
}
@@ -180,8 +180,8 @@
// This is just like a call, but uses become cold.
CCallCustom::forEachArg(
inst,
- [&] (Arg& arg, Arg::Role role, Arg::Type type, Arg::Width width) {
- functor(arg, Arg::cooled(role), type, width);
+ [&] (Arg& arg, Arg::Role role, Bank bank, Width width) {
+ functor(arg, Arg::cooled(role), bank, width);
});
}
};
@@ -195,11 +195,11 @@
Arg& src = inst.args[i + 0];
Arg& dst = inst.args[i + 1];
Arg& widthArg = inst.args[i + 2];
- Arg::Width width = widthArg.width();
- Arg::Type type = src.isGP() && dst.isGP() ? Arg::GP : Arg::FP;
- functor(src, Arg::Use, type, width);
- functor(dst, Arg::Def, type, width);
- functor(widthArg, Arg::Use, Arg::GP, Arg::Width8);
+ Width width = widthArg.width();
+ Bank bank = src.isGP() && dst.isGP() ? GP : FP;
+ functor(src, Arg::Use, bank, width);
+ functor(dst, Arg::Def, bank, width);
+ functor(widthArg, Arg::Use, GP, Width8);
}
}
@@ -280,8 +280,8 @@
template<typename Func>
static void forEachArg(Inst& inst, const Func& functor)
{
- functor(inst.args[0], Arg::Use, Arg::GP, Arg::Width64);
- functor(inst.args[1], Arg::Use, Arg::GP, Arg::Width64);
+ functor(inst.args[0], Arg::Use, GP, Width64);
+ functor(inst.args[1], Arg::Use, GP, Width64);
}
template<typename... Arguments>
diff --git a/Source/JavaScriptCore/b3/air/AirDumpAsJS.cpp b/Source/JavaScriptCore/b3/air/AirDumpAsJS.cpp
index 3d8d6fb..5a5f303 100644
--- a/Source/JavaScriptCore/b3/air/AirDumpAsJS.cpp
+++ b/Source/JavaScriptCore/b3/air/AirDumpAsJS.cpp
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2016 Apple Inc. All rights reserved.
+ * Copyright (C) 2016-2017 Apple Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -60,16 +60,16 @@
return toCString("Reg.", reg.debugName());
}
-CString varNameForTmpWithTypeAndIndex(Arg::Type type, unsigned index)
+CString varNameForTmpWithBankAndIndex(Bank bank, unsigned index)
{
- return toCString(type == Arg::FP ? "f" : "", "tmp", index);
+ return toCString(bank == FP ? "f" : "", "tmp", index);
}
CString varName(Tmp tmp)
{
if (tmp.isReg())
return varName(tmp.reg());
- return varNameForTmpWithTypeAndIndex(Arg(tmp).type(), tmp.tmpIndex());
+ return varNameForTmpWithBankAndIndex(Arg(tmp).bank(), tmp.tmpIndex());
}
} // anonymous namespace
@@ -96,11 +96,11 @@
out.println("code.addStackSlot(1, Spill);");
}
- Arg::forEachType(
- [&] (Arg::Type type) {
- for (unsigned i = code.numTmps(type); i--;) {
+ forEachBank(
+ [&] (Bank bank) {
+ for (unsigned i = code.numTmps(bank); i--;) {
out.println(
- "let ", varNameForTmpWithTypeAndIndex(type, i), " = code.newTmp(", type, ");");
+ "let ", varNameForTmpWithBankAndIndex(bank, i), " = code.newTmp(", bank, ");");
}
});
@@ -123,7 +123,7 @@
out.println("inst = new Inst(", inst.kind.opcode, ");");
inst.forEachArg(
- [&] (Arg& arg, Arg::Role, Arg::Type, Arg::Width) {
+ [&] (Arg& arg, Arg::Role, Bank, Width) {
switch (arg.kind()) {
case Arg::Invalid:
RELEASE_ASSERT_NOT_REACHED();
@@ -216,9 +216,9 @@
out.println("inst.patchArgData = [];");
inst.forEachArg(
- [&] (Arg&, Arg::Role role, Arg::Type type, Arg::Width width) {
+ [&] (Arg&, Arg::Role role, Bank bank, Width width) {
out.println(
- "inst.patchArgData.push({role: Arg.", role, ", type: ", type,
+ "inst.patchArgData.push({role: Arg.", role, ", type: ", bank,
", width: ", width, "});");
});
}
diff --git a/Source/JavaScriptCore/b3/air/AirEliminateDeadCode.cpp b/Source/JavaScriptCore/b3/air/AirEliminateDeadCode.cpp
index ca36af9..7716358 100644
--- a/Source/JavaScriptCore/b3/air/AirEliminateDeadCode.cpp
+++ b/Source/JavaScriptCore/b3/air/AirEliminateDeadCode.cpp
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2015-2016 Apple Inc. All rights reserved.
+ * Copyright (C) 2015-2017 Apple Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -80,7 +80,7 @@
// This instruction should be presumed dead, if its Args are all dead.
bool storesToLive = false;
inst.forEachArg(
- [&] (Arg& arg, Arg::Role role, Arg::Type, Arg::Width) {
+ [&] (Arg& arg, Arg::Role role, Bank, Width) {
if (!Arg::isAnyDef(role))
return;
if (role == Arg::Scratch)
diff --git a/Source/JavaScriptCore/b3/air/AirEmitShuffle.cpp b/Source/JavaScriptCore/b3/air/AirEmitShuffle.cpp
index 3184719..c08ee4a 100644
--- a/Source/JavaScriptCore/b3/air/AirEmitShuffle.cpp
+++ b/Source/JavaScriptCore/b3/air/AirEmitShuffle.cpp
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2016 Apple Inc. All rights reserved.
+ * Copyright (C) 2016-2017 Apple Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -40,8 +40,8 @@
bool verbose = false;
template<typename Functor>
-Tmp findPossibleScratch(Code& code, Arg::Type type, const Functor& functor) {
- for (Reg reg : code.regsInPriorityOrder(type)) {
+Tmp findPossibleScratch(Code& code, Bank bank, const Functor& functor) {
+ for (Reg reg : code.regsInPriorityOrder(bank)) {
Tmp tmp(reg);
if (functor(tmp))
return tmp;
@@ -49,9 +49,9 @@
return Tmp();
}
-Tmp findPossibleScratch(Code& code, Arg::Type type, const Arg& arg1, const Arg& arg2) {
+Tmp findPossibleScratch(Code& code, Bank bank, const Arg& arg1, const Arg& arg2) {
return findPossibleScratch(
- code, type,
+ code, bank,
[&] (Tmp tmp) -> bool {
return !arg1.usesTmp(tmp) && !arg2.usesTmp(tmp);
});
@@ -79,7 +79,7 @@
}
Vector<Inst> emitShuffle(
- Code& code, Vector<ShufflePair> pairs, std::array<Arg, 2> scratches, Arg::Type type,
+ Code& code, Vector<ShufflePair> pairs, std::array<Arg, 2> scratches, Bank bank,
Value* origin)
{
if (verbose) {
@@ -96,8 +96,8 @@
// First validate that this is the kind of shuffle that we know how to deal with.
#if !ASSERT_DISABLED
for (const ShufflePair& pair : pairs) {
- ASSERT(pair.src().isType(type));
- ASSERT(pair.dst().isType(type));
+ ASSERT(pair.src().isBank(bank));
+ ASSERT(pair.dst().isBank(bank));
ASSERT(pair.dst().isTmp() || pair.dst().isMemory());
}
#endif // !ASSERT_DISABLED
@@ -260,18 +260,18 @@
// Lucky for us, we are guaranteed to have extra scratch registers anytime we have a Shift that
// ends with a register. We search for such a register right now.
- auto moveForWidth = [&] (Arg::Width width) -> Opcode {
+ auto moveForWidth = [&] (Width width) -> Opcode {
switch (width) {
- case Arg::Width32:
- return type == Arg::GP ? Move32 : MoveFloat;
- case Arg::Width64:
- return type == Arg::GP ? Move : MoveDouble;
+ case Width32:
+ return bank == GP ? Move32 : MoveFloat;
+ case Width64:
+ return bank == GP ? Move : MoveDouble;
default:
RELEASE_ASSERT_NOT_REACHED();
}
};
- Opcode conservativeMove = moveForWidth(Arg::conservativeWidth(type));
+ Opcode conservativeMove = moveForWidth(conservativeWidth(bank));
// We will emit things in reverse. We maintain a list of packs of instructions, and then we emit
// append them together in reverse (for example the thing at the end of resultPacks is placed
@@ -304,7 +304,7 @@
if (!isValidForm(move, pair.src().kind(), pair.dst().kind())) {
Tmp scratch =
- getScratch(scratchIndex, findPossibleScratch(code, type, pair.src(), pair.dst()));
+ getScratch(scratchIndex, findPossibleScratch(code, bank, pair.src(), pair.dst()));
RELEASE_ASSERT(scratch);
if (isValidForm(move, pair.src().kind(), Arg::Tmp))
result.append(Inst(moveForWidth(pair.width()), origin, pair.src(), scratch));
@@ -373,24 +373,24 @@
bool canSwap = false;
Opcode swap = Oops;
- Arg::Width swapWidth = Arg::Width8; // bogus value
+ Width swapWidth = Width8; // bogus value
// Currently, the swap instruction is not available for floating point on any architecture we
// support.
- if (type == Arg::GP) {
+ if (bank == GP) {
// Figure out whether we will be doing 64-bit swaps or 32-bit swaps. If we have a mix of
// widths we handle that by fixing up the relevant register with zero-extends.
swap = Swap32;
- swapWidth = Arg::Width32;
+ swapWidth = Width32;
bool hasMemory = false;
bool hasIndex = false;
for (ShufflePair& pair : rotate.loop) {
switch (pair.width()) {
- case Arg::Width32:
+ case Width32:
break;
- case Arg::Width64:
+ case Width64:
swap = Swap64;
- swapWidth = Arg::Width64;
+ swapWidth = Width64;
break;
default:
RELEASE_ASSERT_NOT_REACHED();
@@ -436,7 +436,7 @@
// Moving data between two spills is rare. To get here a lot of rare stuff has to
// all happen at once.
- Tmp scratch = getScratch(0, findPossibleScratch(code, type, left, right));
+ Tmp scratch = getScratch(0, findPossibleScratch(code, bank, left, right));
RELEASE_ASSERT(scratch);
result.append(Inst(moveForWidth(swapWidth), origin, left, scratch));
result.append(Inst(swap, origin, scratch, right));
@@ -455,8 +455,8 @@
if (pair.width() == swapWidth)
continue;
- RELEASE_ASSERT(pair.width() == Arg::Width32);
- RELEASE_ASSERT(swapWidth == Arg::Width64);
+ RELEASE_ASSERT(pair.width() == Width32);
+ RELEASE_ASSERT(swapWidth == Width64);
RELEASE_ASSERT(pair.dst().isTmp());
// Need to do an extra zero extension.
@@ -470,7 +470,7 @@
// available register file.
Tmp scratch = findPossibleScratch(
- code, type,
+ code, bank,
[&] (Tmp tmp) -> bool {
for (ShufflePair pair : rotate.loop) {
if (pair.src().usesTmp(tmp))
@@ -520,7 +520,7 @@
Vector<ShufflePair> gpPairs;
Vector<ShufflePair> fpPairs;
for (const ShufflePair& pair : pairs) {
- if (pair.src().isMemory() && pair.dst().isMemory() && pair.width() > Arg::pointerWidth()) {
+ if (pair.src().isMemory() && pair.dst().isMemory() && pair.width() > pointerWidth()) {
// 8-byte memory-to-memory moves on a 32-bit platform are best handled as float moves.
fpPairs.append(pair);
} else if (pair.src().isGP() && pair.dst().isGP()) {
@@ -532,8 +532,8 @@
}
Vector<Inst> result;
- result.appendVector(emitShuffle(code, gpPairs, gpScratch, Arg::GP, origin));
- result.appendVector(emitShuffle(code, fpPairs, fpScratch, Arg::FP, origin));
+ result.appendVector(emitShuffle(code, gpPairs, gpScratch, GP, origin));
+ result.appendVector(emitShuffle(code, fpPairs, fpScratch, FP, origin));
return result;
}
diff --git a/Source/JavaScriptCore/b3/air/AirEmitShuffle.h b/Source/JavaScriptCore/b3/air/AirEmitShuffle.h
index b2c3bb0..edb02bb 100644
--- a/Source/JavaScriptCore/b3/air/AirEmitShuffle.h
+++ b/Source/JavaScriptCore/b3/air/AirEmitShuffle.h
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2016 Apple Inc. All rights reserved.
+ * Copyright (C) 2016-2017 Apple Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -45,7 +45,7 @@
{
}
- ShufflePair(const Arg& src, const Arg& dst, Arg::Width width)
+ ShufflePair(const Arg& src, const Arg& dst, Width width)
: m_src(src)
, m_dst(dst)
, m_width(width)
@@ -57,14 +57,14 @@
// The width determines the kind of move we do. You can only choose Width32 or Width64 right now.
// For GP, it picks between Move32 and Move. For FP, it picks between MoveFloat and MoveDouble.
- Arg::Width width() const { return m_width; }
+ Width width() const { return m_width; }
void dump(PrintStream&) const;
private:
Arg m_src;
Arg m_dst;
- Arg::Width m_width { Arg::Width8 };
+ Width m_width { Width8 };
};
// Create a Shuffle instruction.
@@ -102,7 +102,7 @@
// NOTE: Use this method (and its friend below) to emit shuffles after register allocation. Before
// register allocation it is much better to simply use the Shuffle instruction.
Vector<Inst> emitShuffle(
- Code& code, Vector<ShufflePair>, std::array<Arg, 2> scratch, Arg::Type, Value* origin);
+ Code& code, Vector<ShufflePair>, std::array<Arg, 2> scratch, Bank, Value* origin);
// Perform a shuffle that involves any number of types. Pass scratch registers or memory locations
// for each type according to the rules above.
diff --git a/Source/JavaScriptCore/b3/air/AirFixObviousSpills.cpp b/Source/JavaScriptCore/b3/air/AirFixObviousSpills.cpp
index d000d6c..d7a40f7 100644
--- a/Source/JavaScriptCore/b3/air/AirFixObviousSpills.cpp
+++ b/Source/JavaScriptCore/b3/air/AirFixObviousSpills.cpp
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2016 Apple Inc. All rights reserved.
+ * Copyright (C) 2016-2017 Apple Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -115,7 +115,7 @@
Inst::forEachDefWithExtraClobberedRegs<Arg>(
&inst, &inst,
- [&] (const Arg& arg, Arg::Role, Arg::Type, Arg::Width) {
+ [&] (const Arg& arg, Arg::Role, Bank, Width) {
if (verbose)
dataLog(" Clobbering ", arg, "\n");
m_state.clobber(arg);
@@ -237,7 +237,7 @@
// information from the liveness analysis. We also can't handle late uses, because we don't
// look at late clobbers when doing this.
bool didThings = false;
- auto handleArg = [&] (Arg& arg, Arg::Role role, Arg::Type, Arg::Width width) {
+ auto handleArg = [&] (Arg& arg, Arg::Role role, Bank, Width width) {
if (!isSpillSlot(arg))
return;
if (!Arg::isEarlyUse(role))
@@ -248,7 +248,7 @@
// Try to get a register if at all possible.
if (const RegSlot* alias = m_state.getRegSlot(arg.stackSlot())) {
switch (width) {
- case Arg::Width64:
+ case Width64:
if (alias->mode != RegSlot::AllBits)
return;
if (verbose)
@@ -256,7 +256,7 @@
arg = Tmp(alias->reg);
didThings = true;
return;
- case Arg::Width32:
+ case Width32:
if (verbose)
dataLog(" Replacing ", arg, " with ", alias->reg, " (subwidth case)\n");
arg = Tmp(alias->reg);
@@ -288,9 +288,9 @@
inst = instCopy;
ASSERT(inst.isValidForm());
inst.forEachArg(
- [&] (Arg& arg, Arg::Role role, Arg::Type type, Arg::Width width) {
+ [&] (Arg& arg, Arg::Role role, Bank bank, Width width) {
Arg argCopy = arg;
- handleArg(arg, role, type, width);
+ handleArg(arg, role, bank, width);
if (!inst.isValidForm())
arg = argCopy;
});
diff --git a/Source/JavaScriptCore/b3/air/AirFixPartialRegisterStalls.cpp b/Source/JavaScriptCore/b3/air/AirFixPartialRegisterStalls.cpp
index b3d5d0b..ae4bd28 100644
--- a/Source/JavaScriptCore/b3/air/AirFixPartialRegisterStalls.cpp
+++ b/Source/JavaScriptCore/b3/air/AirFixPartialRegisterStalls.cpp
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2015-2016 Apple Inc. All rights reserved.
+ * Copyright (C) 2015-2017 Apple Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -120,7 +120,7 @@
return;
}
- inst.forEachTmp([&] (Tmp& tmp, Arg::Role role, Arg::Type, Arg::Width) {
+ inst.forEachTmp([&] (Tmp& tmp, Arg::Role role, Bank, Width) {
ASSERT_WITH_MESSAGE(tmp.isReg(), "This phase must be run after register allocation.");
if (tmp.isFPR() && Arg::isAnyDef(role))
@@ -210,7 +210,7 @@
if (hasPartialXmmRegUpdate(inst)) {
RegisterSet defs;
RegisterSet uses;
- inst.forEachTmp([&] (Tmp& tmp, Arg::Role role, Arg::Type, Arg::Width) {
+ inst.forEachTmp([&] (Tmp& tmp, Arg::Role role, Bank, Width) {
if (tmp.isFPR()) {
if (Arg::isAnyDef(role))
defs.set(tmp.fpr());
diff --git a/Source/JavaScriptCore/b3/air/AirInst.cpp b/Source/JavaScriptCore/b3/air/AirInst.cpp
index defb344..410034f 100644
--- a/Source/JavaScriptCore/b3/air/AirInst.cpp
+++ b/Source/JavaScriptCore/b3/air/AirInst.cpp
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2015-2016 Apple Inc. All rights reserved.
+ * Copyright (C) 2015-2017 Apple Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -38,7 +38,7 @@
{
bool result = false;
forEachArg(
- [&] (Arg&, Arg::Role role, Arg::Type, Arg::Width) {
+ [&] (Arg&, Arg::Role role, Bank, Width) {
if (Arg::isAnyDef(role))
result = true;
});
diff --git a/Source/JavaScriptCore/b3/air/AirInst.h b/Source/JavaScriptCore/b3/air/AirInst.h
index f38c21d..b770455 100644
--- a/Source/JavaScriptCore/b3/air/AirInst.h
+++ b/Source/JavaScriptCore/b3/air/AirInst.h
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2015-2016 Apple Inc. All rights reserved.
+ * Copyright (C) 2015-2017 Apple Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -105,7 +105,7 @@
arg.forEachTmpFast(functor);
}
- typedef void EachArgCallback(Arg&, Arg::Role, Arg::Type, Arg::Width);
+ typedef void EachArgCallback(Arg&, Arg::Role, Bank, Width);
// Calls the functor with (arg, role, type, width). This function is auto-generated by
// opcode_generator.rb.
@@ -117,8 +117,8 @@
void forEachTmp(const Functor& functor)
{
forEachArg(
- [&] (Arg& arg, Arg::Role role, Arg::Type type, Arg::Width width) {
- arg.forEachTmp(role, type, width, functor);
+ [&] (Arg& arg, Arg::Role role, Bank bank, Width width) {
+ arg.forEachTmp(role, bank, width, functor);
});
}
diff --git a/Source/JavaScriptCore/b3/air/AirInstInlines.h b/Source/JavaScriptCore/b3/air/AirInstInlines.h
index 2d3da62..9660508 100644
--- a/Source/JavaScriptCore/b3/air/AirInstInlines.h
+++ b/Source/JavaScriptCore/b3/air/AirInstInlines.h
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2015-2016 Apple Inc. All rights reserved.
+ * Copyright (C) 2015-2017 Apple Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -39,8 +39,8 @@
void Inst::forEach(const Functor& functor)
{
forEachArg(
- [&] (Arg& arg, Arg::Role role, Arg::Type type, Arg::Width width) {
- arg.forEach<Thing>(role, type, width, functor);
+ [&] (Arg& arg, Arg::Role role, Bank bank, Width width) {
+ arg.forEach<Thing>(role, bank, width, functor);
});
}
@@ -61,17 +61,17 @@
{
if (prevInst) {
prevInst->forEach<Thing>(
- [&] (Thing& thing, Arg::Role role, Arg::Type argType, Arg::Width argWidth) {
+ [&] (Thing& thing, Arg::Role role, Bank argBank, Width argWidth) {
if (Arg::isLateDef(role))
- functor(thing, role, argType, argWidth);
+ functor(thing, role, argBank, argWidth);
});
}
if (nextInst) {
nextInst->forEach<Thing>(
- [&] (Thing& thing, Arg::Role role, Arg::Type argType, Arg::Width argWidth) {
+ [&] (Thing& thing, Arg::Role role, Bank argBank, Width argWidth) {
if (Arg::isEarlyDef(role))
- functor(thing, role, argType, argWidth);
+ functor(thing, role, argBank, argWidth);
});
}
}
@@ -85,8 +85,8 @@
Arg::Role regDefRole;
auto reportReg = [&] (Reg reg) {
- Arg::Type type = reg.isGPR() ? Arg::GP : Arg::FP;
- functor(Thing(reg), regDefRole, type, Arg::conservativeWidth(type));
+ Bank bank = reg.isGPR() ? GP : FP;
+ functor(Thing(reg), regDefRole, bank, conservativeWidth(bank));
};
if (prevInst && prevInst->kind.opcode == Patch) {
diff --git a/Source/JavaScriptCore/b3/air/AirLiveness.h b/Source/JavaScriptCore/b3/air/AirLiveness.h
index e727c36c..9e124fd 100644
--- a/Source/JavaScriptCore/b3/air/AirLiveness.h
+++ b/Source/JavaScriptCore/b3/air/AirLiveness.h
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2015-2016 Apple Inc. All rights reserved.
+ * Copyright (C) 2015-2017 Apple Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -39,7 +39,7 @@
namespace JSC { namespace B3 { namespace Air {
-template<Arg::Type adapterType>
+template<Bank adapterBank>
struct TmpLivenessAdapter {
typedef Tmp Thing;
typedef HashSet<unsigned> IndexSet;
@@ -48,12 +48,12 @@
static unsigned numIndices(Code& code)
{
- unsigned numTmps = code.numTmps(adapterType);
- return AbsoluteTmpMapper<adapterType>::absoluteIndex(numTmps);
+ unsigned numTmps = code.numTmps(adapterBank);
+ return AbsoluteTmpMapper<adapterBank>::absoluteIndex(numTmps);
}
- static bool acceptsType(Arg::Type type) { return type == adapterType; }
- static unsigned valueToIndex(Tmp tmp) { return AbsoluteTmpMapper<adapterType>::absoluteIndex(tmp); }
- static Tmp indexToValue(unsigned index) { return AbsoluteTmpMapper<adapterType>::tmpFromAbsoluteIndex(index); }
+ static bool acceptsBank(Bank bank) { return bank == adapterBank; }
+ static unsigned valueToIndex(Tmp tmp) { return AbsoluteTmpMapper<adapterBank>::absoluteIndex(tmp); }
+ static Tmp indexToValue(unsigned index) { return AbsoluteTmpMapper<adapterBank>::tmpFromAbsoluteIndex(index); }
};
struct StackSlotLivenessAdapter {
@@ -69,7 +69,7 @@
{
return code.stackSlots().size();
}
- static bool acceptsType(Arg::Type) { return true; }
+ static bool acceptsBank(Bank) { return true; }
static unsigned valueToIndex(StackSlot* stackSlot) { return stackSlot->index(); }
StackSlot* indexToValue(unsigned index) { return m_code.stackSlots()[index]; }
@@ -88,7 +88,7 @@
return Reg::maxIndex() + 1;
}
- static bool acceptsType(Arg::Type) { return true; }
+ static bool acceptsBank(Bank) { return true; }
static unsigned valueToIndex(Reg reg) { return reg.index(); }
Reg indexToValue(unsigned index) { return Reg::fromIndex(index); }
};
@@ -110,8 +110,8 @@
typename Adapter::IndexSet& liveAtTail = m_liveAtTail[block];
block->last().forEach<typename Adapter::Thing>(
- [&] (typename Adapter::Thing& thing, Arg::Role role, Arg::Type type, Arg::Width) {
- if (Arg::isLateUse(role) && Adapter::acceptsType(type))
+ [&] (typename Adapter::Thing& thing, Arg::Role role, Bank bank, Width) {
+ if (Arg::isLateUse(role) && Adapter::acceptsBank(bank))
liveAtTail.add(Adapter::valueToIndex(thing));
});
}
@@ -139,8 +139,8 @@
// Handle the early def's of the first instruction.
block->at(0).forEach<typename Adapter::Thing>(
- [&] (typename Adapter::Thing& thing, Arg::Role role, Arg::Type type, Arg::Width) {
- if (Arg::isEarlyDef(role) && Adapter::acceptsType(type))
+ [&] (typename Adapter::Thing& thing, Arg::Role role, Bank bank, Width) {
+ if (Arg::isEarlyDef(role) && Adapter::acceptsBank(bank))
m_workset.remove(Adapter::valueToIndex(thing));
});
@@ -254,23 +254,23 @@
if (instIndex + 1 < m_block->size()) {
Inst& nextInst = m_block->at(instIndex + 1);
nextInst.forEach<typename Adapter::Thing>(
- [&] (typename Adapter::Thing& thing, Arg::Role role, Arg::Type type, Arg::Width) {
- if (Arg::isEarlyDef(role) && Adapter::acceptsType(type))
+ [&] (typename Adapter::Thing& thing, Arg::Role role, Bank bank, Width) {
+ if (Arg::isEarlyDef(role) && Adapter::acceptsBank(bank))
workset.remove(Adapter::valueToIndex(thing));
});
}
// Then handle def's.
inst.forEach<typename Adapter::Thing>(
- [&] (typename Adapter::Thing& thing, Arg::Role role, Arg::Type type, Arg::Width) {
- if (Arg::isLateDef(role) && Adapter::acceptsType(type))
+ [&] (typename Adapter::Thing& thing, Arg::Role role, Bank bank, Width) {
+ if (Arg::isLateDef(role) && Adapter::acceptsBank(bank))
workset.remove(Adapter::valueToIndex(thing));
});
// Then handle use's.
inst.forEach<typename Adapter::Thing>(
- [&] (typename Adapter::Thing& thing, Arg::Role role, Arg::Type type, Arg::Width) {
- if (Arg::isEarlyUse(role) && Adapter::acceptsType(type))
+ [&] (typename Adapter::Thing& thing, Arg::Role role, Bank bank, Width) {
+ if (Arg::isEarlyUse(role) && Adapter::acceptsBank(bank))
workset.add(Adapter::valueToIndex(thing));
});
@@ -278,8 +278,8 @@
if (instIndex) {
Inst& prevInst = m_block->at(instIndex - 1);
prevInst.forEach<typename Adapter::Thing>(
- [&] (typename Adapter::Thing& thing, Arg::Role role, Arg::Type type, Arg::Width) {
- if (Arg::isLateUse(role) && Adapter::acceptsType(type))
+ [&] (typename Adapter::Thing& thing, Arg::Role role, Bank bank, Width) {
+ if (Arg::isLateUse(role) && Adapter::acceptsBank(bank))
workset.add(Adapter::valueToIndex(thing));
});
}
@@ -379,11 +379,11 @@
IndexMap<BasicBlock, typename Adapter::IndexSet> m_liveAtTail;
};
-template<Arg::Type type>
-using TmpLiveness = AbstractLiveness<TmpLivenessAdapter<type>>;
+template<Bank bank>
+using TmpLiveness = AbstractLiveness<TmpLivenessAdapter<bank>>;
-typedef AbstractLiveness<TmpLivenessAdapter<Arg::GP>> GPLiveness;
-typedef AbstractLiveness<TmpLivenessAdapter<Arg::FP>> FPLiveness;
+typedef AbstractLiveness<TmpLivenessAdapter<GP>> GPLiveness;
+typedef AbstractLiveness<TmpLivenessAdapter<FP>> FPLiveness;
typedef AbstractLiveness<StackSlotLivenessAdapter> StackSlotLiveness;
typedef AbstractLiveness<RegLivenessAdapter> RegLiveness;
diff --git a/Source/JavaScriptCore/b3/air/AirLogRegisterPressure.cpp b/Source/JavaScriptCore/b3/air/AirLogRegisterPressure.cpp
index dbbb257..d1af2d5 100644
--- a/Source/JavaScriptCore/b3/air/AirLogRegisterPressure.cpp
+++ b/Source/JavaScriptCore/b3/air/AirLogRegisterPressure.cpp
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2016 Apple Inc. All rights reserved.
+ * Copyright (C) 2016-2017 Apple Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -58,7 +58,7 @@
set.setAll(localCalc.live());
Inst::forEachDefWithExtraClobberedRegs<Reg>(
prevInst, &inst,
- [&] (Reg reg, Arg::Role, Arg::Type, Arg::Width) {
+ [&] (Reg reg, Arg::Role, Bank, Width) {
set.set(reg);
});
diff --git a/Source/JavaScriptCore/b3/air/AirLowerAfterRegAlloc.cpp b/Source/JavaScriptCore/b3/air/AirLowerAfterRegAlloc.cpp
index e001873..12bc954 100644
--- a/Source/JavaScriptCore/b3/air/AirLowerAfterRegAlloc.cpp
+++ b/Source/JavaScriptCore/b3/air/AirLowerAfterRegAlloc.cpp
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2016 Apple Inc. All rights reserved.
+ * Copyright (C) 2016-2017 Apple Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -81,11 +81,11 @@
}
}
- auto getScratches = [&] (RegisterSet set, Arg::Type type) -> std::array<Arg, 2> {
+ auto getScratches = [&] (RegisterSet set, Bank bank) -> std::array<Arg, 2> {
std::array<Arg, 2> result;
for (unsigned i = 0; i < 2; ++i) {
bool found = false;
- for (Reg reg : code.regsInPriorityOrder(type)) {
+ for (Reg reg : code.regsInPriorityOrder(bank)) {
if (!set.get(reg)) {
result[i] = Tmp(reg);
set.set(reg);
@@ -96,7 +96,7 @@
if (!found) {
result[i] = Arg::stack(
code.addStackSlot(
- Arg::bytes(Arg::conservativeWidth(type)),
+ bytes(conservativeWidth(bank)),
StackSlotKind::Spill));
}
}
@@ -116,7 +116,7 @@
for (unsigned i = 0; i < inst.args.size(); i += 3) {
Arg src = inst.args[i + 0];
Arg dst = inst.args[i + 1];
- Arg::Width width = inst.args[i + 2].width();
+ Width width = inst.args[i + 2].width();
// The used register set contains things live after the shuffle. But
// emitShuffle() wants a scratch register that is not just dead but also does not
@@ -130,8 +130,8 @@
pairs.append(ShufflePair(src, dst, width));
}
- std::array<Arg, 2> gpScratch = getScratches(set, Arg::GP);
- std::array<Arg, 2> fpScratch = getScratches(set, Arg::FP);
+ std::array<Arg, 2> gpScratch = getScratches(set, GP);
+ std::array<Arg, 2> fpScratch = getScratches(set, FP);
insertionSet.insertInsts(
instIndex, emitShuffle(code, pairs, gpScratch, fpScratch, inst.origin));
inst = Inst();
@@ -158,7 +158,7 @@
Value* child = value->child(i);
Arg src = inst.args[result ? (i >= 1 ? i + 1 : i) : i ];
Arg dst = destinations[i];
- Arg::Width width = Arg::widthForB3Type(child->type());
+ Width width = widthForType(child->type());
pairs.append(ShufflePair(src, dst, width));
auto excludeRegisters = [&] (Tmp tmp) {
@@ -169,8 +169,8 @@
dst.forEachTmpFast(excludeRegisters);
}
- std::array<Arg, 2> gpScratch = getScratches(preUsed, Arg::GP);
- std::array<Arg, 2> fpScratch = getScratches(preUsed, Arg::FP);
+ std::array<Arg, 2> gpScratch = getScratches(preUsed, GP);
+ std::array<Arg, 2> fpScratch = getScratches(preUsed, FP);
// Also need to save all live registers. Don't need to worry about the result
// register.
@@ -181,9 +181,9 @@
[&] (Reg reg) {
Tmp tmp(reg);
Arg arg(tmp);
- Arg::Width width = Arg::conservativeWidth(arg.type());
+ Width width = conservativeWidth(arg.bank());
StackSlot* stackSlot =
- code.addStackSlot(Arg::bytes(width), StackSlotKind::Spill);
+ code.addStackSlot(bytes(width), StackSlotKind::Spill);
pairs.append(ShufflePair(arg, Arg::stack(stackSlot), width));
stackSlots.append(stackSlot);
});
@@ -205,12 +205,12 @@
[&] (Reg reg) {
Tmp tmp(reg);
Arg arg(tmp);
- Arg::Width width = Arg::conservativeWidth(arg.type());
+ Width width = conservativeWidth(arg.bank());
StackSlot* stackSlot = stackSlots[stackSlotIndex++];
pairs.append(ShufflePair(Arg::stack(stackSlot), arg, width));
});
if (result) {
- ShufflePair pair(result, originalResult, Arg::widthForB3Type(value->type()));
+ ShufflePair pair(result, originalResult, widthForType(value->type()));
pairs.append(pair);
}
@@ -219,8 +219,8 @@
if (originalResult.isReg())
liveRegs.set(originalResult.reg());
- gpScratch = getScratches(liveRegs, Arg::GP);
- fpScratch = getScratches(liveRegs, Arg::FP);
+ gpScratch = getScratches(liveRegs, GP);
+ fpScratch = getScratches(liveRegs, FP);
insertionSet.insertInsts(
instIndex + 1, emitShuffle(code, pairs, gpScratch, fpScratch, inst.origin));
diff --git a/Source/JavaScriptCore/b3/air/AirLowerMacros.cpp b/Source/JavaScriptCore/b3/air/AirLowerMacros.cpp
index b086b7b..e03e8d5 100644
--- a/Source/JavaScriptCore/b3/air/AirLowerMacros.cpp
+++ b/Source/JavaScriptCore/b3/air/AirLowerMacros.cpp
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2016 Apple Inc. All rights reserved.
+ * Copyright (C) 2016-2017 Apple Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -60,7 +60,7 @@
Value* child = value->child(i);
shuffleArguments.args.append(inst.args[offset + i]);
shuffleArguments.args.append(destinations[i]);
- shuffleArguments.args.append(Arg::widthArg(Arg::widthForB3Type(child->type())));
+ shuffleArguments.args.append(Arg::widthArg(widthForType(child->type())));
}
insertionSet.insertInst(instIndex, WTFMove(shuffleArguments));
diff --git a/Source/JavaScriptCore/b3/air/AirPadInterference.cpp b/Source/JavaScriptCore/b3/air/AirPadInterference.cpp
index 91de56b..0410099 100644
--- a/Source/JavaScriptCore/b3/air/AirPadInterference.cpp
+++ b/Source/JavaScriptCore/b3/air/AirPadInterference.cpp
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2016 Apple Inc. All rights reserved.
+ * Copyright (C) 2016-2017 Apple Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -45,7 +45,7 @@
bool hasEarlyDef = false;
bool hasLate = false;
inst.forEachArg(
- [&] (Arg&, Arg::Role role, Arg::Type, Arg::Width) {
+ [&] (Arg&, Arg::Role role, Bank, Width) {
switch (role) {
case Arg::EarlyDef:
hasEarlyDef = true;
diff --git a/Source/JavaScriptCore/b3/air/AirReportUsedRegisters.cpp b/Source/JavaScriptCore/b3/air/AirReportUsedRegisters.cpp
index bb0aeab..4b8e3b9 100644
--- a/Source/JavaScriptCore/b3/air/AirReportUsedRegisters.cpp
+++ b/Source/JavaScriptCore/b3/air/AirReportUsedRegisters.cpp
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2015-2016 Apple Inc. All rights reserved.
+ * Copyright (C) 2015-2017 Apple Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -53,7 +53,7 @@
if (!inst.hasNonArgEffects()) {
bool canDelete = true;
inst.forEachArg(
- [&] (Arg& arg, Arg::Role role, Arg::Type, Arg::Width) {
+ [&] (Arg& arg, Arg::Role role, Bank, Width) {
if (Arg::isEarlyDef(role)) {
canDelete = false;
return;
diff --git a/Source/JavaScriptCore/b3/air/AirSpillEverything.cpp b/Source/JavaScriptCore/b3/air/AirSpillEverything.cpp
index ebf3774..78bea0e 100644
--- a/Source/JavaScriptCore/b3/air/AirSpillEverything.cpp
+++ b/Source/JavaScriptCore/b3/air/AirSpillEverything.cpp
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2015-2016 Apple Inc. All rights reserved.
+ * Copyright (C) 2015-2017 Apple Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -70,7 +70,7 @@
// code is suboptimal.
Inst::forEachDefWithExtraClobberedRegs<Tmp>(
block->get(index - 1), block->get(index),
- [&] (const Tmp& tmp, Arg::Role, Arg::Type, Arg::Width) {
+ [&] (const Tmp& tmp, Arg::Role, Bank, Width) {
if (tmp.isReg())
registerSet.set(tmp.reg());
});
@@ -85,12 +85,12 @@
}
// Allocate a stack slot for each tmp.
- Vector<StackSlot*> allStackSlots[Arg::numTypes];
- for (unsigned typeIndex = 0; typeIndex < Arg::numTypes; ++typeIndex) {
- Vector<StackSlot*>& stackSlots = allStackSlots[typeIndex];
- Arg::Type type = static_cast<Arg::Type>(typeIndex);
- stackSlots.resize(code.numTmps(type));
- for (unsigned tmpIndex = code.numTmps(type); tmpIndex--;)
+ Vector<StackSlot*> allStackSlots[numBanks];
+ for (unsigned bankIndex = 0; bankIndex < numBanks; ++bankIndex) {
+ Vector<StackSlot*>& stackSlots = allStackSlots[bankIndex];
+ Bank bank = static_cast<Bank>(bankIndex);
+ stackSlots.resize(code.numTmps(bank));
+ for (unsigned tmpIndex = code.numTmps(bank); tmpIndex--;)
stackSlots[tmpIndex] = code.addStackSlot(8, StackSlotKind::Spill);
}
@@ -110,7 +110,7 @@
continue;
if (inst.admitsStack(i)) {
- StackSlot* stackSlot = allStackSlots[arg.type()][arg.tmpIndex()];
+ StackSlot* stackSlot = allStackSlots[arg.bank()][arg.tmpIndex()];
arg = Arg::stack(stackSlot);
continue;
}
@@ -119,11 +119,11 @@
// Now fall back on spilling using separate Move's to load/store the tmp.
inst.forEachTmp(
- [&] (Tmp& tmp, Arg::Role role, Arg::Type type, Arg::Width) {
+ [&] (Tmp& tmp, Arg::Role role, Bank bank, Width) {
if (tmp.isReg())
return;
- StackSlot* stackSlot = allStackSlots[type][tmp.tmpIndex()];
+ StackSlot* stackSlot = allStackSlots[bank][tmp.tmpIndex()];
Arg arg = Arg::stack(stackSlot);
// Need to figure out a register to use. How we do that depends on the role.
@@ -131,7 +131,7 @@
switch (role) {
case Arg::Use:
case Arg::ColdUse:
- for (Reg reg : code.regsInPriorityOrder(type)) {
+ for (Reg reg : code.regsInPriorityOrder(bank)) {
if (!setBefore.get(reg)) {
setBefore.set(reg);
chosenReg = reg;
@@ -141,7 +141,7 @@
break;
case Arg::Def:
case Arg::ZDef:
- for (Reg reg : code.regsInPriorityOrder(type)) {
+ for (Reg reg : code.regsInPriorityOrder(bank)) {
if (!setAfter.get(reg)) {
setAfter.set(reg);
chosenReg = reg;
@@ -155,7 +155,7 @@
case Arg::LateColdUse:
case Arg::Scratch:
case Arg::EarlyDef:
- for (Reg reg : code.regsInPriorityOrder(type)) {
+ for (Reg reg : code.regsInPriorityOrder(bank)) {
if (!setBefore.get(reg) && !setAfter.get(reg)) {
setAfter.set(reg);
setBefore.set(reg);
@@ -173,7 +173,7 @@
tmp = Tmp(chosenReg);
- Opcode move = type == Arg::GP ? Move : MoveDouble;
+ Opcode move = bank == GP ? Move : MoveDouble;
if (Arg::isAnyUse(role) && role != Arg::Scratch)
insertionSet.insert(instIndex, move, inst.origin, arg, tmp);
diff --git a/Source/JavaScriptCore/b3/air/AirTmpInlines.h b/Source/JavaScriptCore/b3/air/AirTmpInlines.h
index a7de098..c113f14 100644
--- a/Source/JavaScriptCore/b3/air/AirTmpInlines.h
+++ b/Source/JavaScriptCore/b3/air/AirTmpInlines.h
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2015 Apple Inc. All rights reserved.
+ * Copyright (C) 2015-2017 Apple Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -39,11 +39,11 @@
// When a Hash structure is too slow or when Sets contains most values, you can
// use direct array addressing with Tmps.
-template<Arg::Type type>
+template<Bank bank>
struct AbsoluteTmpMapper;
template<>
-struct AbsoluteTmpMapper<Arg::GP> {
+struct AbsoluteTmpMapper<GP> {
static unsigned absoluteIndex(const Tmp& tmp)
{
ASSERT(tmp.isGP());
@@ -68,7 +68,7 @@
};
template<>
-struct AbsoluteTmpMapper<Arg::FP> {
+struct AbsoluteTmpMapper<FP> {
static unsigned absoluteIndex(const Tmp& tmp)
{
ASSERT(tmp.isFP());
diff --git a/Source/JavaScriptCore/b3/air/AirTmpWidth.cpp b/Source/JavaScriptCore/b3/air/AirTmpWidth.cpp
index f1173c0..7ae7e2f 100644
--- a/Source/JavaScriptCore/b3/air/AirTmpWidth.cpp
+++ b/Source/JavaScriptCore/b3/air/AirTmpWidth.cpp
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2015-2016 Apple Inc. All rights reserved.
+ * Copyright (C) 2015-2017 Apple Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -63,9 +63,9 @@
auto assumeTheWorst = [&] (Tmp tmp) {
Widths& widths = m_width.add(tmp, Widths()).iterator->value;
- Arg::Type type = Arg(tmp).type();
- widths.use = Arg::conservativeWidth(type);
- widths.def = Arg::conservativeWidth(type);
+ Bank bank = Arg(tmp).bank();
+ widths.use = conservativeWidth(bank);
+ widths.def = conservativeWidth(bank);
};
// Assume the worst for registers.
@@ -92,8 +92,8 @@
if (inst.args[0].isTmp()) {
// Make sure that both sides of the Move have a width already initialized. The
// fixpoint below assumes that it never has to add things to the HashMap.
- m_width.add(inst.args[0].tmp(), Widths(Arg::GP));
- m_width.add(inst.args[1].tmp(), Widths(Arg::GP));
+ m_width.add(inst.args[0].tmp(), Widths(GP));
+ m_width.add(inst.args[1].tmp(), Widths(GP));
moves.append(&inst);
continue;
@@ -101,23 +101,23 @@
if (inst.args[0].isImm()
&& inst.args[0].value() >= 0) {
Tmp tmp = inst.args[1].tmp();
- Widths& widths = m_width.add(tmp, Widths(Arg::GP)).iterator->value;
+ Widths& widths = m_width.add(tmp, Widths(GP)).iterator->value;
if (inst.args[0].value() <= std::numeric_limits<int8_t>::max())
- widths.def = std::max(widths.def, Arg::Width8);
+ widths.def = std::max(widths.def, Width8);
else if (inst.args[0].value() <= std::numeric_limits<int16_t>::max())
- widths.def = std::max(widths.def, Arg::Width16);
+ widths.def = std::max(widths.def, Width16);
else if (inst.args[0].value() <= std::numeric_limits<int32_t>::max())
- widths.def = std::max(widths.def, Arg::Width32);
+ widths.def = std::max(widths.def, Width32);
else
- widths.def = std::max(widths.def, Arg::Width64);
+ widths.def = std::max(widths.def, Width64);
continue;
}
}
inst.forEachTmp(
- [&] (Tmp& tmp, Arg::Role role, Arg::Type type, Arg::Width width) {
- Widths& widths = m_width.add(tmp, Widths(type)).iterator->value;
+ [&] (Tmp& tmp, Arg::Role role, Bank bank, Width width) {
+ Widths& widths = m_width.add(tmp, Widths(bank)).iterator->value;
if (Arg::isAnyUse(role))
widths.use = std::max(widths.use, width);
@@ -125,7 +125,7 @@
if (Arg::isZDef(role))
widths.def = std::max(widths.def, width);
else if (Arg::isAnyDef(role))
- widths.def = Arg::conservativeWidth(type);
+ widths.def = conservativeWidth(bank);
});
}
}
diff --git a/Source/JavaScriptCore/b3/air/AirTmpWidth.h b/Source/JavaScriptCore/b3/air/AirTmpWidth.h
index ea612b6..b23b327 100644
--- a/Source/JavaScriptCore/b3/air/AirTmpWidth.h
+++ b/Source/JavaScriptCore/b3/air/AirTmpWidth.h
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2015-2016 Apple Inc. All rights reserved.
+ * Copyright (C) 2015-2017 Apple Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -50,20 +50,20 @@
//
// This doesn't tell you which of those properties holds, but you can query that using the other
// methods.
- Arg::Width width(Tmp tmp) const
+ Width width(Tmp tmp) const
{
auto iter = m_width.find(tmp);
if (iter == m_width.end())
- return Arg::minimumWidth(Arg(tmp).type());
+ return minimumWidth(Arg(tmp).bank());
return std::min(iter->value.use, iter->value.def);
}
// Return the minimum required width for all defs/uses of this Tmp.
- Arg::Width requiredWidth(Tmp tmp)
+ Width requiredWidth(Tmp tmp)
{
auto iter = m_width.find(tmp);
if (iter == m_width.end())
- return Arg::minimumWidth(Arg(tmp).type());
+ return minimumWidth(Arg(tmp).bank());
return std::max(iter->value.use, iter->value.def);
}
@@ -73,20 +73,20 @@
// TotalBits - defWidth(tmp)
//
// Where TotalBits are the total number of bits in the register, so 64 on a 64-bit system.
- Arg::Width defWidth(Tmp tmp) const
+ Width defWidth(Tmp tmp) const
{
auto iter = m_width.find(tmp);
if (iter == m_width.end())
- return Arg::minimumWidth(Arg(tmp).type());
+ return minimumWidth(Arg(tmp).bank());
return iter->value.def;
}
// This tells you how much of Tmp is going to be read.
- Arg::Width useWidth(Tmp tmp) const
+ Width useWidth(Tmp tmp) const
{
auto iter = m_width.find(tmp);
if (iter == m_width.end())
- return Arg::minimumWidth(Arg(tmp).type());
+ return minimumWidth(Arg(tmp).bank());
return iter->value.use;
}
@@ -94,16 +94,16 @@
struct Widths {
Widths() { }
- Widths(Arg::Type type)
+ Widths(Bank bank)
{
- use = Arg::minimumWidth(type);
- def = Arg::minimumWidth(type);
+ use = minimumWidth(bank);
+ def = minimumWidth(bank);
}
void dump(PrintStream& out) const;
- Arg::Width use;
- Arg::Width def;
+ Width use;
+ Width def;
};
HashMap<Tmp, Widths> m_width;
diff --git a/Source/JavaScriptCore/b3/air/AirUseCounts.h b/Source/JavaScriptCore/b3/air/AirUseCounts.h
index 98a7493..90a268c 100644
--- a/Source/JavaScriptCore/b3/air/AirUseCounts.h
+++ b/Source/JavaScriptCore/b3/air/AirUseCounts.h
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2015-2016 Apple Inc. All rights reserved.
+ * Copyright (C) 2015-2017 Apple Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -77,7 +77,7 @@
frequency *= Options::rareBlockPenalty();
for (Inst& inst : *block) {
inst.forEach<Thing>(
- [&] (Thing& arg, Arg::Role role, Arg::Type, Arg::Width) {
+ [&] (Thing& arg, Arg::Role role, Bank, Width) {
Counts& counts = m_counts.add(arg, Counts()).iterator->value;
if (Arg::isWarmUse(role))
diff --git a/Source/JavaScriptCore/b3/air/AirValidate.cpp b/Source/JavaScriptCore/b3/air/AirValidate.cpp
index d90de62..fbbcf74 100644
--- a/Source/JavaScriptCore/b3/air/AirValidate.cpp
+++ b/Source/JavaScriptCore/b3/air/AirValidate.cpp
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2015-2016 Apple Inc. All rights reserved.
+ * Copyright (C) 2015-2017 Apple Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -90,7 +90,7 @@
// forEachArg must return Arg&'s that point into the args array.
inst.forEachArg(
- [&] (Arg& arg, Arg::Role, Arg::Type, Arg::Width) {
+ [&] (Arg& arg, Arg::Role, Bank, Width) {
VALIDATE(&arg >= &inst.args[0], ("At ", arg, " in ", inst, " in ", *block));
VALIDATE(&arg <= &inst.args.last(), ("At ", arg, " in ", inst, " in ", *block));
});
diff --git a/Source/JavaScriptCore/b3/air/opcode_generator.rb b/Source/JavaScriptCore/b3/air/opcode_generator.rb
index d142405..a50b465 100644
--- a/Source/JavaScriptCore/b3/air/opcode_generator.rb
+++ b/Source/JavaScriptCore/b3/air/opcode_generator.rb
@@ -1,6 +1,6 @@
#!/usr/bin/env ruby
-# Copyright (C) 2015-2016 Apple Inc. All rights reserved.
+# Copyright (C) 2015-2017 Apple Inc. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
@@ -44,19 +44,19 @@
end
class Arg
- attr_reader :role, :type, :width
+ attr_reader :role, :bank, :width
- def initialize(role, type, width)
+ def initialize(role, bank, width)
@role = role
- @type = type
+ @bank = bank
@width = width
end
def widthCode
if width == "Ptr"
- "Arg::pointerWidth()"
+ "pointerWidth()"
else
- "Arg::Width#{width}"
+ "Width#{width}"
end
end
end
@@ -255,9 +255,9 @@
result
end
- def consumeType
+ def consumeBank
result = token.string
- parseError("Expected type (G or F)") unless isGF(result)
+ parseError("Expected bank (G or F)") unless isGF(result)
advance
result
end
@@ -369,11 +369,11 @@
loop {
role = consumeRole
consume(":")
- type = consumeType
+ bank = consumeBank
consume(":")
width = consumeWidth
- signature << Arg.new(role, type, width)
+ signature << Arg.new(role, bank, width)
break unless token == ","
consume(",")
@@ -430,7 +430,7 @@
if signature[index].role != "U"
parseError("Form has an immediate for a non-use argument")
end
- if signature[index].type != "G"
+ if signature[index].bank != "G"
parseError("Form has an immediate for a non-general-purpose argument")
end
end
@@ -655,7 +655,7 @@
raise
end
- outp.puts "functor(args[#{index}], Arg::#{role}, Arg::#{arg.type}P, #{arg.widthCode});"
+ outp.puts "functor(args[#{index}], Arg::#{role}, #{arg.bank}P, #{arg.widthCode});"
}
end
}
@@ -793,7 +793,7 @@
# Some kinds of Args reqire additional validation.
case kind.name
when "Tmp"
- outp.puts "if (!args[#{index}].tmp().is#{arg.type}P())"
+ outp.puts "if (!args[#{index}].tmp().is#{arg.bank}P())"
outp.puts "OPGEN_RETURN(false);"
when "Imm"
outp.puts "if (!Arg::isValidImmForm(args[#{index}].value()))"
@@ -1086,7 +1086,7 @@
end
case kind.name
when "Tmp"
- if overload.signature[index].type == "G"
+ if overload.signature[index].bank == "G"
outp.print "args[#{index}].gpr()"
else
outp.print "args[#{index}].fpr()"
@@ -1168,7 +1168,7 @@
raise
end
- outp.puts "inst.visitArg(#{index}, func, Arg.#{role}, #{arg.type}P, #{arg.width});"
+ outp.puts "inst.visitArg(#{index}, func, Arg.#{role}, #{arg.bank}P, #{arg.width});"
}
outp.puts "break;"
}
diff --git a/Source/JavaScriptCore/b3/air/testair.cpp b/Source/JavaScriptCore/b3/air/testair.cpp
index 9f8a8d8..c3f5f3c 100644
--- a/Source/JavaScriptCore/b3/air/testair.cpp
+++ b/Source/JavaScriptCore/b3/air/testair.cpp
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2016 Apple Inc. All rights reserved.
+ * Copyright (C) 2016-2017 Apple Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -59,6 +59,14 @@
using namespace JSC;
using namespace JSC::B3::Air;
+using JSC::B3::FP;
+using JSC::B3::GP;
+using JSC::B3::Width;
+using JSC::B3::Width8;
+using JSC::B3::Width16;
+using JSC::B3::Width32;
+using JSC::B3::Width64;
+
namespace {
StaticLock crashLock;
@@ -151,11 +159,11 @@
loadConstant(root, 4, Tmp(GPRInfo::regT3));
root->append(
Shuffle, nullptr,
- Tmp(GPRInfo::regT2), Tmp(GPRInfo::regT3), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT3), Tmp(GPRInfo::regT2), Arg::widthArg(Arg::Width32));
+ Tmp(GPRInfo::regT2), Tmp(GPRInfo::regT3), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT3), Tmp(GPRInfo::regT2), Arg::widthArg(Width32));
int32_t things[4];
- Tmp base = code.newTmp(Arg::GP);
+ Tmp base = code.newTmp(GP);
root->append(Move, nullptr, Arg::bigImm(bitwise_cast<intptr_t>(&things)), base);
root->append(Move32, nullptr, Tmp(GPRInfo::regT0), Arg::addr(base, 0 * sizeof(int32_t)));
root->append(Move32, nullptr, Tmp(GPRInfo::regT1), Arg::addr(base, 1 * sizeof(int32_t)));
@@ -186,11 +194,11 @@
loadConstant(root, 4, Tmp(GPRInfo::regT3));
root->append(
Shuffle, nullptr,
- Tmp(GPRInfo::regT2), Tmp(GPRInfo::regT3), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT3), Tmp(GPRInfo::regT4), Arg::widthArg(Arg::Width32));
+ Tmp(GPRInfo::regT2), Tmp(GPRInfo::regT3), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT3), Tmp(GPRInfo::regT4), Arg::widthArg(Width32));
int32_t things[5];
- Tmp base = code.newTmp(Arg::GP);
+ Tmp base = code.newTmp(GP);
root->append(Move, nullptr, Arg::bigImm(bitwise_cast<intptr_t>(&things)), base);
root->append(Move32, nullptr, Tmp(GPRInfo::regT0), Arg::addr(base, 0 * sizeof(int32_t)));
root->append(Move32, nullptr, Tmp(GPRInfo::regT1), Arg::addr(base, 1 * sizeof(int32_t)));
@@ -227,16 +235,16 @@
loadConstant(root, 8, Tmp(GPRInfo::regT7));
root->append(
Shuffle, nullptr,
- Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT1), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT1), Tmp(GPRInfo::regT2), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT2), Tmp(GPRInfo::regT3), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT3), Tmp(GPRInfo::regT4), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT4), Tmp(GPRInfo::regT5), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT5), Tmp(GPRInfo::regT6), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT6), Tmp(GPRInfo::regT7), Arg::widthArg(Arg::Width32));
+ Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT1), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT1), Tmp(GPRInfo::regT2), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT2), Tmp(GPRInfo::regT3), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT3), Tmp(GPRInfo::regT4), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT4), Tmp(GPRInfo::regT5), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT5), Tmp(GPRInfo::regT6), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT6), Tmp(GPRInfo::regT7), Arg::widthArg(Width32));
int32_t things[8];
- Tmp base = code.newTmp(Arg::GP);
+ Tmp base = code.newTmp(GP);
root->append(Move, nullptr, Arg::bigImm(bitwise_cast<intptr_t>(&things)), base);
root->append(Move32, nullptr, Tmp(GPRInfo::regT0), Arg::addr(base, 0 * sizeof(int32_t)));
root->append(Move32, nullptr, Tmp(GPRInfo::regT1), Arg::addr(base, 1 * sizeof(int32_t)));
@@ -279,16 +287,16 @@
loadConstant(root, 8, Tmp(GPRInfo::regT7));
root->append(
Shuffle, nullptr,
- Tmp(GPRInfo::regT6), Tmp(GPRInfo::regT7), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT5), Tmp(GPRInfo::regT6), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT4), Tmp(GPRInfo::regT5), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT3), Tmp(GPRInfo::regT4), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT2), Tmp(GPRInfo::regT3), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT1), Tmp(GPRInfo::regT2), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT1), Arg::widthArg(Arg::Width32));
+ Tmp(GPRInfo::regT6), Tmp(GPRInfo::regT7), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT5), Tmp(GPRInfo::regT6), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT4), Tmp(GPRInfo::regT5), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT3), Tmp(GPRInfo::regT4), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT2), Tmp(GPRInfo::regT3), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT1), Tmp(GPRInfo::regT2), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT1), Arg::widthArg(Width32));
int32_t things[8];
- Tmp base = code.newTmp(Arg::GP);
+ Tmp base = code.newTmp(GP);
root->append(Move, nullptr, Arg::bigImm(bitwise_cast<intptr_t>(&things)), base);
root->append(Move32, nullptr, Tmp(GPRInfo::regT0), Arg::addr(base, 0 * sizeof(int32_t)));
root->append(Move32, nullptr, Tmp(GPRInfo::regT1), Arg::addr(base, 1 * sizeof(int32_t)));
@@ -327,12 +335,12 @@
loadConstant(root, 4, Tmp(GPRInfo::regT3));
root->append(
Shuffle, nullptr,
- Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT1), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT1), Tmp(GPRInfo::regT2), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT2), Tmp(GPRInfo::regT0), Arg::widthArg(Arg::Width32));
+ Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT1), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT1), Tmp(GPRInfo::regT2), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT2), Tmp(GPRInfo::regT0), Arg::widthArg(Width32));
int32_t things[4];
- Tmp base = code.newTmp(Arg::GP);
+ Tmp base = code.newTmp(GP);
root->append(Move, nullptr, Arg::bigImm(bitwise_cast<intptr_t>(&things)), base);
root->append(Move32, nullptr, Tmp(GPRInfo::regT0), Arg::addr(base, 0 * sizeof(int32_t)));
root->append(Move32, nullptr, Tmp(GPRInfo::regT1), Arg::addr(base, 1 * sizeof(int32_t)));
@@ -363,12 +371,12 @@
loadConstant(root, 4, Tmp(GPRInfo::regT3));
root->append(
Shuffle, nullptr,
- Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT1), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT2), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT3), Arg::widthArg(Arg::Width32));
+ Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT1), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT2), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT3), Arg::widthArg(Width32));
int32_t things[4];
- Tmp base = code.newTmp(Arg::GP);
+ Tmp base = code.newTmp(GP);
root->append(Move, nullptr, Arg::bigImm(bitwise_cast<intptr_t>(&things)), base);
root->append(Move32, nullptr, Tmp(GPRInfo::regT0), Arg::addr(base, 0 * sizeof(int32_t)));
root->append(Move32, nullptr, Tmp(GPRInfo::regT1), Arg::addr(base, 1 * sizeof(int32_t)));
@@ -392,7 +400,7 @@
B3::Procedure proc;
Code& code = proc.code();
- const Vector<Reg>& regs = code.regsInPriorityOrder(Arg::GP);
+ const Vector<Reg>& regs = code.regsInPriorityOrder(GP);
BasicBlock* root = code.addBlock();
root->append(Move, nullptr, Arg::imm(35), Tmp(GPRInfo::regT0));
@@ -404,7 +412,7 @@
Inst& shuffle = root->append(Shuffle, nullptr);
for (Reg reg : regs) {
if (reg != Reg(GPRInfo::regT0))
- shuffle.append(Tmp(GPRInfo::regT0), Tmp(reg), Arg::widthArg(Arg::Width32));
+ shuffle.append(Tmp(GPRInfo::regT0), Tmp(reg), Arg::widthArg(Width32));
}
StackSlot* slot = code.addStackSlot(sizeof(int32_t) * regs.size(), StackSlotKind::Locked);
@@ -412,7 +420,7 @@
root->append(Move32, nullptr, Tmp(regs[i]), Arg::stack(slot, i * sizeof(int32_t)));
Vector<int32_t> things(regs.size(), 666);
- Tmp base = code.newTmp(Arg::GP);
+ Tmp base = code.newTmp(GP);
root->append(Move, nullptr, Arg::bigImm(bitwise_cast<intptr_t>(&things[0])), base);
for (unsigned i = 0; i < regs.size(); ++i) {
root->append(Move32, nullptr, Arg::stack(slot, i * sizeof(int32_t)), Tmp(GPRInfo::regT0));
@@ -444,16 +452,16 @@
loadConstant(root, 8, Tmp(GPRInfo::regT7));
root->append(
Shuffle, nullptr,
- Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT1), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT2), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT1), Tmp(GPRInfo::regT3), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT1), Tmp(GPRInfo::regT4), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT2), Tmp(GPRInfo::regT5), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT2), Tmp(GPRInfo::regT6), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT3), Tmp(GPRInfo::regT7), Arg::widthArg(Arg::Width32));
+ Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT1), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT2), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT1), Tmp(GPRInfo::regT3), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT1), Tmp(GPRInfo::regT4), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT2), Tmp(GPRInfo::regT5), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT2), Tmp(GPRInfo::regT6), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT3), Tmp(GPRInfo::regT7), Arg::widthArg(Width32));
int32_t things[8];
- Tmp base = code.newTmp(Arg::GP);
+ Tmp base = code.newTmp(GP);
root->append(Move, nullptr, Arg::bigImm(bitwise_cast<intptr_t>(&things)), base);
root->append(Move32, nullptr, Tmp(GPRInfo::regT0), Arg::addr(base, 0 * sizeof(int32_t)));
root->append(Move32, nullptr, Tmp(GPRInfo::regT1), Arg::addr(base, 1 * sizeof(int32_t)));
@@ -496,16 +504,16 @@
loadConstant(root, 8, Tmp(GPRInfo::regT7));
root->append(
Shuffle, nullptr,
- Tmp(GPRInfo::regT3), Tmp(GPRInfo::regT7), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT2), Tmp(GPRInfo::regT6), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT2), Tmp(GPRInfo::regT5), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT1), Tmp(GPRInfo::regT4), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT1), Tmp(GPRInfo::regT3), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT2), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT1), Arg::widthArg(Arg::Width32));
+ Tmp(GPRInfo::regT3), Tmp(GPRInfo::regT7), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT2), Tmp(GPRInfo::regT6), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT2), Tmp(GPRInfo::regT5), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT1), Tmp(GPRInfo::regT4), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT1), Tmp(GPRInfo::regT3), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT2), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT1), Arg::widthArg(Width32));
int32_t things[8];
- Tmp base = code.newTmp(Arg::GP);
+ Tmp base = code.newTmp(GP);
root->append(Move, nullptr, Arg::bigImm(bitwise_cast<intptr_t>(&things)), base);
root->append(Move32, nullptr, Tmp(GPRInfo::regT0), Arg::addr(base, 0 * sizeof(int32_t)));
root->append(Move32, nullptr, Tmp(GPRInfo::regT1), Arg::addr(base, 1 * sizeof(int32_t)));
@@ -551,16 +559,16 @@
loadConstant(root, 8, Tmp(GPRInfo::regT7));
root->append(
Shuffle, nullptr,
- Tmp(GPRInfo::regT4), Tmp(GPRInfo::regT7), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT5), Tmp(GPRInfo::regT6), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT5), Tmp(GPRInfo::regT5), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT6), Tmp(GPRInfo::regT4), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT6), Tmp(GPRInfo::regT3), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT7), Tmp(GPRInfo::regT2), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT7), Tmp(GPRInfo::regT1), Arg::widthArg(Arg::Width32));
+ Tmp(GPRInfo::regT4), Tmp(GPRInfo::regT7), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT5), Tmp(GPRInfo::regT6), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT5), Tmp(GPRInfo::regT5), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT6), Tmp(GPRInfo::regT4), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT6), Tmp(GPRInfo::regT3), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT7), Tmp(GPRInfo::regT2), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT7), Tmp(GPRInfo::regT1), Arg::widthArg(Width32));
int32_t things[8];
- Tmp base = code.newTmp(Arg::GP);
+ Tmp base = code.newTmp(GP);
root->append(Move, nullptr, Arg::bigImm(bitwise_cast<intptr_t>(&things)), base);
root->append(Move32, nullptr, Tmp(GPRInfo::regT0), Arg::addr(base, 0 * sizeof(int32_t)));
root->append(Move32, nullptr, Tmp(GPRInfo::regT1), Arg::addr(base, 1 * sizeof(int32_t)));
@@ -601,13 +609,13 @@
loadConstant(root, 6, Tmp(GPRInfo::regT5));
root->append(
Shuffle, nullptr,
- Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT1), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT2), Tmp(GPRInfo::regT3), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT2), Tmp(GPRInfo::regT4), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT5), Arg::widthArg(Arg::Width32));
+ Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT1), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT2), Tmp(GPRInfo::regT3), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT2), Tmp(GPRInfo::regT4), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT5), Arg::widthArg(Width32));
int32_t things[6];
- Tmp base = code.newTmp(Arg::GP);
+ Tmp base = code.newTmp(GP);
root->append(Move, nullptr, Arg::bigImm(bitwise_cast<intptr_t>(&things)), base);
root->append(Move32, nullptr, Tmp(GPRInfo::regT0), Arg::addr(base, 0 * sizeof(int32_t)));
root->append(Move32, nullptr, Tmp(GPRInfo::regT1), Arg::addr(base, 1 * sizeof(int32_t)));
@@ -644,15 +652,15 @@
loadConstant(root, 6, Tmp(GPRInfo::regT5));
root->append(
Shuffle, nullptr,
- Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT1), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT1), Tmp(GPRInfo::regT2), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT2), Tmp(GPRInfo::regT0), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT3), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT1), Tmp(GPRInfo::regT4), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT2), Tmp(GPRInfo::regT5), Arg::widthArg(Arg::Width32));
+ Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT1), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT1), Tmp(GPRInfo::regT2), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT2), Tmp(GPRInfo::regT0), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT3), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT1), Tmp(GPRInfo::regT4), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT2), Tmp(GPRInfo::regT5), Arg::widthArg(Width32));
int32_t things[6];
- Tmp base = code.newTmp(Arg::GP);
+ Tmp base = code.newTmp(GP);
root->append(Move, nullptr, Arg::bigImm(bitwise_cast<intptr_t>(&things)), base);
root->append(Move32, nullptr, Tmp(GPRInfo::regT0), Arg::addr(base, 0 * sizeof(int32_t)));
root->append(Move32, nullptr, Tmp(GPRInfo::regT1), Arg::addr(base, 1 * sizeof(int32_t)));
@@ -689,15 +697,15 @@
loadConstant(root, 6, Tmp(GPRInfo::regT5));
root->append(
Shuffle, nullptr,
- Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT3), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT1), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT1), Tmp(GPRInfo::regT4), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT2), Tmp(GPRInfo::regT0), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT2), Tmp(GPRInfo::regT5), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT1), Tmp(GPRInfo::regT2), Arg::widthArg(Arg::Width32));
+ Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT3), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT1), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT1), Tmp(GPRInfo::regT4), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT2), Tmp(GPRInfo::regT0), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT2), Tmp(GPRInfo::regT5), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT1), Tmp(GPRInfo::regT2), Arg::widthArg(Width32));
int32_t things[6];
- Tmp base = code.newTmp(Arg::GP);
+ Tmp base = code.newTmp(GP);
root->append(Move, nullptr, Arg::bigImm(bitwise_cast<intptr_t>(&things)), base);
root->append(Move32, nullptr, Tmp(GPRInfo::regT0), Arg::addr(base, 0 * sizeof(int32_t)));
root->append(Move32, nullptr, Tmp(GPRInfo::regT1), Arg::addr(base, 1 * sizeof(int32_t)));
@@ -734,15 +742,15 @@
loadConstant(root, 6, Tmp(GPRInfo::regT5));
root->append(
Shuffle, nullptr,
- Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT1), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT1), Tmp(GPRInfo::regT2), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT2), Tmp(GPRInfo::regT0), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT3), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT3), Tmp(GPRInfo::regT4), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT4), Tmp(GPRInfo::regT5), Arg::widthArg(Arg::Width32));
+ Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT1), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT1), Tmp(GPRInfo::regT2), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT2), Tmp(GPRInfo::regT0), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT3), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT3), Tmp(GPRInfo::regT4), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT4), Tmp(GPRInfo::regT5), Arg::widthArg(Width32));
int32_t things[6];
- Tmp base = code.newTmp(Arg::GP);
+ Tmp base = code.newTmp(GP);
root->append(Move, nullptr, Arg::bigImm(bitwise_cast<intptr_t>(&things)), base);
root->append(Move32, nullptr, Tmp(GPRInfo::regT0), Arg::addr(base, 0 * sizeof(int32_t)));
root->append(Move32, nullptr, Tmp(GPRInfo::regT1), Arg::addr(base, 1 * sizeof(int32_t)));
@@ -779,15 +787,15 @@
loadConstant(root, 6, Tmp(GPRInfo::regT5));
root->append(
Shuffle, nullptr,
- Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT1), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT1), Tmp(GPRInfo::regT2), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT2), Tmp(GPRInfo::regT0), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT3), Tmp(GPRInfo::regT4), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT4), Tmp(GPRInfo::regT5), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT5), Tmp(GPRInfo::regT3), Arg::widthArg(Arg::Width32));
+ Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT1), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT1), Tmp(GPRInfo::regT2), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT2), Tmp(GPRInfo::regT0), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT3), Tmp(GPRInfo::regT4), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT4), Tmp(GPRInfo::regT5), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT5), Tmp(GPRInfo::regT3), Arg::widthArg(Width32));
int32_t things[6];
- Tmp base = code.newTmp(Arg::GP);
+ Tmp base = code.newTmp(GP);
root->append(Move, nullptr, Arg::bigImm(bitwise_cast<intptr_t>(&things)), base);
root->append(Move32, nullptr, Tmp(GPRInfo::regT0), Arg::addr(base, 0 * sizeof(int32_t)));
root->append(Move32, nullptr, Tmp(GPRInfo::regT1), Arg::addr(base, 1 * sizeof(int32_t)));
@@ -824,14 +832,14 @@
loadConstant(root, 6, Tmp(GPRInfo::regT5));
root->append(
Shuffle, nullptr,
- Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT1), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT1), Tmp(GPRInfo::regT2), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT2), Tmp(GPRInfo::regT0), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT3), Tmp(GPRInfo::regT4), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT4), Tmp(GPRInfo::regT5), Arg::widthArg(Arg::Width32));
+ Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT1), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT1), Tmp(GPRInfo::regT2), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT2), Tmp(GPRInfo::regT0), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT3), Tmp(GPRInfo::regT4), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT4), Tmp(GPRInfo::regT5), Arg::widthArg(Width32));
int32_t things[6];
- Tmp base = code.newTmp(Arg::GP);
+ Tmp base = code.newTmp(GP);
root->append(Move, nullptr, Arg::bigImm(bitwise_cast<intptr_t>(&things)), base);
root->append(Move32, nullptr, Tmp(GPRInfo::regT0), Arg::addr(base, 0 * sizeof(int32_t)));
root->append(Move32, nullptr, Tmp(GPRInfo::regT1), Arg::addr(base, 1 * sizeof(int32_t)));
@@ -859,21 +867,21 @@
B3::Procedure proc;
Code& code = proc.code();
- const Vector<Reg>& regs = code.regsInPriorityOrder(Arg::GP);
+ const Vector<Reg>& regs = code.regsInPriorityOrder(GP);
BasicBlock* root = code.addBlock();
for (unsigned i = 0; i < regs.size(); ++i)
loadConstant(root, 35 + i, Tmp(regs[i]));
Inst& shuffle = root->append(Shuffle, nullptr);
for (unsigned i = 1; i < regs.size(); ++i)
- shuffle.append(Tmp(regs[i - 1]), Tmp(regs[i]), Arg::widthArg(Arg::Width32));
+ shuffle.append(Tmp(regs[i - 1]), Tmp(regs[i]), Arg::widthArg(Width32));
StackSlot* slot = code.addStackSlot(sizeof(int32_t) * regs.size(), StackSlotKind::Locked);
for (unsigned i = 0; i < regs.size(); ++i)
root->append(Move32, nullptr, Tmp(regs[i]), Arg::stack(slot, i * sizeof(int32_t)));
Vector<int32_t> things(regs.size(), 666);
- Tmp base = code.newTmp(Arg::GP);
+ Tmp base = code.newTmp(GP);
root->append(Move, nullptr, Arg::bigImm(bitwise_cast<intptr_t>(&things[0])), base);
for (unsigned i = 0; i < regs.size(); ++i) {
root->append(Move32, nullptr, Arg::stack(slot, i * sizeof(int32_t)), Tmp(GPRInfo::regT0));
@@ -895,22 +903,22 @@
B3::Procedure proc;
Code& code = proc.code();
- const Vector<Reg>& regs = code.regsInPriorityOrder(Arg::GP);
+ const Vector<Reg>& regs = code.regsInPriorityOrder(GP);
BasicBlock* root = code.addBlock();
for (unsigned i = 0; i < regs.size(); ++i)
loadConstant(root, 35 + i, Tmp(regs[i]));
Inst& shuffle = root->append(Shuffle, nullptr);
for (unsigned i = 1; i < regs.size(); ++i)
- shuffle.append(Tmp(regs[i - 1]), Tmp(regs[i]), Arg::widthArg(Arg::Width32));
- shuffle.append(Tmp(regs.last()), Tmp(regs[0]), Arg::widthArg(Arg::Width32));
+ shuffle.append(Tmp(regs[i - 1]), Tmp(regs[i]), Arg::widthArg(Width32));
+ shuffle.append(Tmp(regs.last()), Tmp(regs[0]), Arg::widthArg(Width32));
StackSlot* slot = code.addStackSlot(sizeof(int32_t) * regs.size(), StackSlotKind::Locked);
for (unsigned i = 0; i < regs.size(); ++i)
root->append(Move32, nullptr, Tmp(regs[i]), Arg::stack(slot, i * sizeof(int32_t)));
Vector<int32_t> things(regs.size(), 666);
- Tmp base = code.newTmp(Arg::GP);
+ Tmp base = code.newTmp(GP);
root->append(Move, nullptr, Arg::bigImm(bitwise_cast<intptr_t>(&things[0])), base);
for (unsigned i = 0; i < regs.size(); ++i) {
root->append(Move32, nullptr, Arg::stack(slot, i * sizeof(int32_t)), Tmp(GPRInfo::regT0));
@@ -939,11 +947,11 @@
loadConstant(root, 40000000000000000ll, Tmp(GPRInfo::regT3));
root->append(
Shuffle, nullptr,
- Tmp(GPRInfo::regT2), Tmp(GPRInfo::regT3), Arg::widthArg(Arg::Width64),
- Tmp(GPRInfo::regT3), Tmp(GPRInfo::regT2), Arg::widthArg(Arg::Width64));
+ Tmp(GPRInfo::regT2), Tmp(GPRInfo::regT3), Arg::widthArg(Width64),
+ Tmp(GPRInfo::regT3), Tmp(GPRInfo::regT2), Arg::widthArg(Width64));
int64_t things[4];
- Tmp base = code.newTmp(Arg::GP);
+ Tmp base = code.newTmp(GP);
root->append(Move, nullptr, Arg::bigImm(bitwise_cast<intptr_t>(&things)), base);
root->append(Move, nullptr, Tmp(GPRInfo::regT0), Arg::addr(base, 0 * sizeof(int64_t)));
root->append(Move, nullptr, Tmp(GPRInfo::regT1), Arg::addr(base, 1 * sizeof(int64_t)));
@@ -975,11 +983,11 @@
loadConstant(root, 50000000000000000ll, Tmp(GPRInfo::regT4));
root->append(
Shuffle, nullptr,
- Tmp(GPRInfo::regT2), Tmp(GPRInfo::regT3), Arg::widthArg(Arg::Width64),
- Tmp(GPRInfo::regT3), Tmp(GPRInfo::regT4), Arg::widthArg(Arg::Width64));
+ Tmp(GPRInfo::regT2), Tmp(GPRInfo::regT3), Arg::widthArg(Width64),
+ Tmp(GPRInfo::regT3), Tmp(GPRInfo::regT4), Arg::widthArg(Width64));
int64_t things[5];
- Tmp base = code.newTmp(Arg::GP);
+ Tmp base = code.newTmp(GP);
root->append(Move, nullptr, Arg::bigImm(bitwise_cast<intptr_t>(&things)), base);
root->append(Move, nullptr, Tmp(GPRInfo::regT0), Arg::addr(base, 0 * sizeof(int64_t)));
root->append(Move, nullptr, Tmp(GPRInfo::regT1), Arg::addr(base, 1 * sizeof(int64_t)));
@@ -1012,11 +1020,11 @@
loadConstant(root, 40000000000000000ll, Tmp(GPRInfo::regT3));
root->append(
Shuffle, nullptr,
- Tmp(GPRInfo::regT2), Tmp(GPRInfo::regT3), Arg::widthArg(Arg::Width32),
- Tmp(GPRInfo::regT3), Tmp(GPRInfo::regT2), Arg::widthArg(Arg::Width64));
+ Tmp(GPRInfo::regT2), Tmp(GPRInfo::regT3), Arg::widthArg(Width32),
+ Tmp(GPRInfo::regT3), Tmp(GPRInfo::regT2), Arg::widthArg(Width64));
int64_t things[4];
- Tmp base = code.newTmp(Arg::GP);
+ Tmp base = code.newTmp(GP);
root->append(Move, nullptr, Arg::bigImm(bitwise_cast<intptr_t>(&things)), base);
root->append(Move, nullptr, Tmp(GPRInfo::regT0), Arg::addr(base, 0 * sizeof(int64_t)));
root->append(Move, nullptr, Tmp(GPRInfo::regT1), Arg::addr(base, 1 * sizeof(int64_t)));
@@ -1048,11 +1056,11 @@
loadConstant(root, 50000000000000000ll, Tmp(GPRInfo::regT4));
root->append(
Shuffle, nullptr,
- Tmp(GPRInfo::regT2), Tmp(GPRInfo::regT3), Arg::widthArg(Arg::Width64),
- Tmp(GPRInfo::regT3), Tmp(GPRInfo::regT4), Arg::widthArg(Arg::Width32));
+ Tmp(GPRInfo::regT2), Tmp(GPRInfo::regT3), Arg::widthArg(Width64),
+ Tmp(GPRInfo::regT3), Tmp(GPRInfo::regT4), Arg::widthArg(Width32));
int64_t things[5];
- Tmp base = code.newTmp(Arg::GP);
+ Tmp base = code.newTmp(GP);
root->append(Move, nullptr, Arg::bigImm(bitwise_cast<intptr_t>(&things)), base);
root->append(Move, nullptr, Tmp(GPRInfo::regT0), Arg::addr(base, 0 * sizeof(int64_t)));
root->append(Move, nullptr, Tmp(GPRInfo::regT1), Arg::addr(base, 1 * sizeof(int64_t)));
@@ -1088,12 +1096,12 @@
root->append(Move, nullptr, Arg::immPtr(&memory), Tmp(GPRInfo::regT2));
root->append(
Shuffle, nullptr,
- Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT1), Arg::widthArg(Arg::Width32),
+ Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT1), Arg::widthArg(Width32),
Arg::addr(Tmp(GPRInfo::regT2), 0 * sizeof(int32_t)),
- Arg::addr(Tmp(GPRInfo::regT2), 1 * sizeof(int32_t)), Arg::widthArg(Arg::Width32));
+ Arg::addr(Tmp(GPRInfo::regT2), 1 * sizeof(int32_t)), Arg::widthArg(Width32));
int32_t things[2];
- Tmp base = code.newTmp(Arg::GP);
+ Tmp base = code.newTmp(GP);
root->append(Move, nullptr, Arg::bigImm(bitwise_cast<intptr_t>(&things)), base);
root->append(Move32, nullptr, Tmp(GPRInfo::regT0), Arg::addr(base, 0 * sizeof(int32_t)));
root->append(Move32, nullptr, Tmp(GPRInfo::regT1), Arg::addr(base, 1 * sizeof(int32_t)));
@@ -1127,19 +1135,19 @@
root->append(
Shuffle, nullptr,
- Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT1), Arg::widthArg(Arg::Width32),
+ Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT1), Arg::widthArg(Width32),
Tmp(GPRInfo::regT1), Arg::addr(Tmp(GPRInfo::regT3), 0 * sizeof(int32_t)),
- Arg::widthArg(Arg::Width32),
+ Arg::widthArg(Width32),
Arg::addr(Tmp(GPRInfo::regT3), 0 * sizeof(int32_t)),
- Arg::addr(Tmp(GPRInfo::regT3), 1 * sizeof(int32_t)), Arg::widthArg(Arg::Width32),
+ Arg::addr(Tmp(GPRInfo::regT3), 1 * sizeof(int32_t)), Arg::widthArg(Width32),
Arg::addr(Tmp(GPRInfo::regT3), 1 * sizeof(int32_t)), Tmp(GPRInfo::regT2),
- Arg::widthArg(Arg::Width32));
+ Arg::widthArg(Width32));
int32_t things[3];
- Tmp base = code.newTmp(Arg::GP);
+ Tmp base = code.newTmp(GP);
root->append(Move, nullptr, Arg::bigImm(bitwise_cast<intptr_t>(&things)), base);
root->append(Move32, nullptr, Tmp(GPRInfo::regT0), Arg::addr(base, 0 * sizeof(int32_t)));
root->append(Move32, nullptr, Tmp(GPRInfo::regT1), Arg::addr(base, 1 * sizeof(int32_t)));
@@ -1167,7 +1175,7 @@
memory[0] = 35;
memory[1] = 36;
- Vector<Reg> regs = code.regsInPriorityOrder(Arg::GP);
+ Vector<Reg> regs = code.regsInPriorityOrder(GP);
regs.removeFirst(Reg(GPRInfo::regT0));
BasicBlock* root = code.addBlock();
@@ -1178,16 +1186,16 @@
Shuffle, nullptr,
Tmp(regs[0]), Arg::addr(Tmp(GPRInfo::regT0), 0 * sizeof(int32_t)),
- Arg::widthArg(Arg::Width32),
+ Arg::widthArg(Width32),
Arg::addr(Tmp(GPRInfo::regT0), 0 * sizeof(int32_t)),
- Arg::addr(Tmp(GPRInfo::regT0), 1 * sizeof(int32_t)), Arg::widthArg(Arg::Width32),
+ Arg::addr(Tmp(GPRInfo::regT0), 1 * sizeof(int32_t)), Arg::widthArg(Width32),
Arg::addr(Tmp(GPRInfo::regT0), 1 * sizeof(int32_t)), Tmp(regs[1]),
- Arg::widthArg(Arg::Width32));
+ Arg::widthArg(Width32));
for (unsigned i = 2; i < regs.size(); ++i)
- shuffle.append(Tmp(regs[i - 1]), Tmp(regs[i]), Arg::widthArg(Arg::Width32));
+ shuffle.append(Tmp(regs[i - 1]), Tmp(regs[i]), Arg::widthArg(Width32));
Vector<int32_t> things(regs.size(), 666);
root->append(Move, nullptr, Arg::bigImm(bitwise_cast<intptr_t>(&things[0])), Tmp(GPRInfo::regT0));
@@ -1217,7 +1225,7 @@
memory[0] = 35000000000000ll;
memory[1] = 36000000000000ll;
- Vector<Reg> regs = code.regsInPriorityOrder(Arg::GP);
+ Vector<Reg> regs = code.regsInPriorityOrder(GP);
regs.removeFirst(Reg(GPRInfo::regT0));
BasicBlock* root = code.addBlock();
@@ -1228,16 +1236,16 @@
Shuffle, nullptr,
Tmp(regs[0]), Arg::addr(Tmp(GPRInfo::regT0), 0 * sizeof(int64_t)),
- Arg::widthArg(Arg::Width64),
+ Arg::widthArg(Width64),
Arg::addr(Tmp(GPRInfo::regT0), 0 * sizeof(int64_t)),
- Arg::addr(Tmp(GPRInfo::regT0), 1 * sizeof(int64_t)), Arg::widthArg(Arg::Width64),
+ Arg::addr(Tmp(GPRInfo::regT0), 1 * sizeof(int64_t)), Arg::widthArg(Width64),
Arg::addr(Tmp(GPRInfo::regT0), 1 * sizeof(int64_t)), Tmp(regs[1]),
- Arg::widthArg(Arg::Width64));
+ Arg::widthArg(Width64));
for (unsigned i = 2; i < regs.size(); ++i)
- shuffle.append(Tmp(regs[i - 1]), Tmp(regs[i]), Arg::widthArg(Arg::Width64));
+ shuffle.append(Tmp(regs[i - 1]), Tmp(regs[i]), Arg::widthArg(Width64));
Vector<int64_t> things(regs.size(), 666);
root->append(Move, nullptr, Arg::bigImm(bitwise_cast<intptr_t>(&things[0])), Tmp(GPRInfo::regT0));
@@ -1278,7 +1286,7 @@
memory[0] = 35000000000000ll;
memory[1] = 36000000000000ll;
- Vector<Reg> regs = code.regsInPriorityOrder(Arg::GP);
+ Vector<Reg> regs = code.regsInPriorityOrder(GP);
regs.removeFirst(Reg(GPRInfo::regT0));
BasicBlock* root = code.addBlock();
@@ -1289,18 +1297,18 @@
Shuffle, nullptr,
Tmp(regs[0]), Arg::addr(Tmp(GPRInfo::regT0), 0 * sizeof(int64_t)),
- Arg::widthArg(Arg::Width32),
+ Arg::widthArg(Width32),
Arg::addr(Tmp(GPRInfo::regT0), 0 * sizeof(int64_t)),
- Arg::addr(Tmp(GPRInfo::regT0), 1 * sizeof(int64_t)), Arg::widthArg(Arg::Width64),
+ Arg::addr(Tmp(GPRInfo::regT0), 1 * sizeof(int64_t)), Arg::widthArg(Width64),
Arg::addr(Tmp(GPRInfo::regT0), 1 * sizeof(int64_t)), Tmp(regs[1]),
- Arg::widthArg(Arg::Width32));
+ Arg::widthArg(Width32));
for (unsigned i = 2; i < regs.size(); ++i) {
shuffle.append(
Tmp(regs[i - 1]), Tmp(regs[i]),
- (i & 1) ? Arg::widthArg(Arg::Width32) : Arg::widthArg(Arg::Width64));
+ (i & 1) ? Arg::widthArg(Width32) : Arg::widthArg(Width64));
}
Vector<int64_t> things(regs.size(), 666);
@@ -1340,19 +1348,19 @@
root->append(
Shuffle, nullptr,
- Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT1), Arg::widthArg(Arg::Width32),
+ Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT1), Arg::widthArg(Width32),
Tmp(GPRInfo::regT1), Arg::addr(Tmp(GPRInfo::regT2), 0 * sizeof(int32_t)),
- Arg::widthArg(Arg::Width32),
+ Arg::widthArg(Width32),
Arg::addr(Tmp(GPRInfo::regT2), 0 * sizeof(int32_t)),
- Arg::addr(Tmp(GPRInfo::regT2), 1 * sizeof(int32_t)), Arg::widthArg(Arg::Width32),
+ Arg::addr(Tmp(GPRInfo::regT2), 1 * sizeof(int32_t)), Arg::widthArg(Width32),
Arg::addr(Tmp(GPRInfo::regT2), 1 * sizeof(int32_t)), Tmp(GPRInfo::regT0),
- Arg::widthArg(Arg::Width32));
+ Arg::widthArg(Width32));
int32_t things[2];
- Tmp base = code.newTmp(Arg::GP);
+ Tmp base = code.newTmp(GP);
root->append(Move, nullptr, Arg::bigImm(bitwise_cast<intptr_t>(&things)), base);
root->append(Move32, nullptr, Tmp(GPRInfo::regT0), Arg::addr(base, 0 * sizeof(int32_t)));
root->append(Move32, nullptr, Tmp(GPRInfo::regT1), Arg::addr(base, 1 * sizeof(int32_t)));
@@ -1385,19 +1393,19 @@
root->append(
Shuffle, nullptr,
- Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT1), Arg::widthArg(Arg::Width64),
+ Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT1), Arg::widthArg(Width64),
Tmp(GPRInfo::regT1), Arg::addr(Tmp(GPRInfo::regT2), 0 * sizeof(int64_t)),
- Arg::widthArg(Arg::Width64),
+ Arg::widthArg(Width64),
Arg::addr(Tmp(GPRInfo::regT2), 0 * sizeof(int64_t)),
- Arg::addr(Tmp(GPRInfo::regT2), 1 * sizeof(int64_t)), Arg::widthArg(Arg::Width64),
+ Arg::addr(Tmp(GPRInfo::regT2), 1 * sizeof(int64_t)), Arg::widthArg(Width64),
Arg::addr(Tmp(GPRInfo::regT2), 1 * sizeof(int64_t)), Tmp(GPRInfo::regT0),
- Arg::widthArg(Arg::Width64));
+ Arg::widthArg(Width64));
int64_t things[2];
- Tmp base = code.newTmp(Arg::GP);
+ Tmp base = code.newTmp(GP);
root->append(Move, nullptr, Arg::bigImm(bitwise_cast<intptr_t>(&things)), base);
root->append(Move, nullptr, Tmp(GPRInfo::regT0), Arg::addr(base, 0 * sizeof(int64_t)));
root->append(Move, nullptr, Tmp(GPRInfo::regT1), Arg::addr(base, 1 * sizeof(int64_t)));
@@ -1430,19 +1438,19 @@
root->append(
Shuffle, nullptr,
- Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT1), Arg::widthArg(Arg::Width32),
+ Tmp(GPRInfo::regT0), Tmp(GPRInfo::regT1), Arg::widthArg(Width32),
Tmp(GPRInfo::regT1), Arg::addr(Tmp(GPRInfo::regT2), 0 * sizeof(int64_t)),
- Arg::widthArg(Arg::Width64),
+ Arg::widthArg(Width64),
Arg::addr(Tmp(GPRInfo::regT2), 0 * sizeof(int64_t)),
- Arg::addr(Tmp(GPRInfo::regT2), 1 * sizeof(int64_t)), Arg::widthArg(Arg::Width32),
+ Arg::addr(Tmp(GPRInfo::regT2), 1 * sizeof(int64_t)), Arg::widthArg(Width32),
Arg::addr(Tmp(GPRInfo::regT2), 1 * sizeof(int64_t)), Tmp(GPRInfo::regT0),
- Arg::widthArg(Arg::Width64));
+ Arg::widthArg(Width64));
int64_t things[2];
- Tmp base = code.newTmp(Arg::GP);
+ Tmp base = code.newTmp(GP);
root->append(Move, nullptr, Arg::bigImm(bitwise_cast<intptr_t>(&things)), base);
root->append(Move, nullptr, Tmp(GPRInfo::regT0), Arg::addr(base, 0 * sizeof(int64_t)));
root->append(Move, nullptr, Tmp(GPRInfo::regT1), Arg::addr(base, 1 * sizeof(int64_t)));
@@ -1468,7 +1476,7 @@
memory[0] = 35000000000000ll;
memory[1] = 36000000000000ll;
- Vector<Reg> regs = code.regsInPriorityOrder(Arg::GP);
+ Vector<Reg> regs = code.regsInPriorityOrder(GP);
regs.removeFirst(Reg(GPRInfo::regT0));
BasicBlock* root = code.addBlock();
@@ -1479,18 +1487,18 @@
Shuffle, nullptr,
Tmp(regs[0]), Arg::addr(Tmp(GPRInfo::regT0), 0 * sizeof(int64_t)),
- Arg::widthArg(Arg::Width64),
+ Arg::widthArg(Width64),
Arg::addr(Tmp(GPRInfo::regT0), 0 * sizeof(int64_t)),
- Arg::addr(Tmp(GPRInfo::regT0), 1 * sizeof(int64_t)), Arg::widthArg(Arg::Width64),
+ Arg::addr(Tmp(GPRInfo::regT0), 1 * sizeof(int64_t)), Arg::widthArg(Width64),
Arg::addr(Tmp(GPRInfo::regT0), 1 * sizeof(int64_t)), Tmp(regs[1]),
- Arg::widthArg(Arg::Width64),
+ Arg::widthArg(Width64),
- regs.last(), regs[0], Arg::widthArg(Arg::Width64));
+ regs.last(), regs[0], Arg::widthArg(Width64));
for (unsigned i = 2; i < regs.size(); ++i)
- shuffle.append(Tmp(regs[i - 1]), Tmp(regs[i]), Arg::widthArg(Arg::Width64));
+ shuffle.append(Tmp(regs[i - 1]), Tmp(regs[i]), Arg::widthArg(Width64));
Vector<int64_t> things(regs.size(), 666);
root->append(Move, nullptr, Arg::bigImm(bitwise_cast<intptr_t>(&things[0])), Tmp(GPRInfo::regT0));
@@ -1520,7 +1528,7 @@
memory[0] = 35000000000000ll;
memory[1] = 36000000000000ll;
- Vector<Reg> regs = code.regsInPriorityOrder(Arg::GP);
+ Vector<Reg> regs = code.regsInPriorityOrder(GP);
regs.removeFirst(Reg(GPRInfo::regT0));
BasicBlock* root = code.addBlock();
@@ -1531,18 +1539,18 @@
Shuffle, nullptr,
Tmp(regs[0]), Arg::addr(Tmp(GPRInfo::regT0), 0 * sizeof(int64_t)),
- Arg::widthArg(Arg::Width32),
+ Arg::widthArg(Width32),
Arg::addr(Tmp(GPRInfo::regT0), 0 * sizeof(int64_t)),
- Arg::addr(Tmp(GPRInfo::regT0), 1 * sizeof(int64_t)), Arg::widthArg(Arg::Width64),
+ Arg::addr(Tmp(GPRInfo::regT0), 1 * sizeof(int64_t)), Arg::widthArg(Width64),
Arg::addr(Tmp(GPRInfo::regT0), 1 * sizeof(int64_t)), Tmp(regs[1]),
- Arg::widthArg(Arg::Width32),
+ Arg::widthArg(Width32),
- regs.last(), regs[0], Arg::widthArg(Arg::Width32));
+ regs.last(), regs[0], Arg::widthArg(Width32));
for (unsigned i = 2; i < regs.size(); ++i)
- shuffle.append(Tmp(regs[i - 1]), Tmp(regs[i]), Arg::widthArg(Arg::Width64));
+ shuffle.append(Tmp(regs[i - 1]), Tmp(regs[i]), Arg::widthArg(Width64));
Vector<int64_t> things(regs.size(), 666);
root->append(Move, nullptr, Arg::bigImm(bitwise_cast<intptr_t>(&things[0])), Tmp(GPRInfo::regT0));
@@ -1575,11 +1583,11 @@
loadDoubleConstant(root, 4, Tmp(FPRInfo::fpRegT3), Tmp(GPRInfo::regT0));
root->append(
Shuffle, nullptr,
- Tmp(FPRInfo::fpRegT2), Tmp(FPRInfo::fpRegT3), Arg::widthArg(Arg::Width64),
- Tmp(FPRInfo::fpRegT3), Tmp(FPRInfo::fpRegT2), Arg::widthArg(Arg::Width64));
+ Tmp(FPRInfo::fpRegT2), Tmp(FPRInfo::fpRegT3), Arg::widthArg(Width64),
+ Tmp(FPRInfo::fpRegT3), Tmp(FPRInfo::fpRegT2), Arg::widthArg(Width64));
double things[4];
- Tmp base = code.newTmp(Arg::GP);
+ Tmp base = code.newTmp(GP);
root->append(Move, nullptr, Arg::bigImm(bitwise_cast<intptr_t>(&things)), base);
root->append(MoveDouble, nullptr, Tmp(FPRInfo::fpRegT0), Arg::addr(base, 0 * sizeof(double)));
root->append(MoveDouble, nullptr, Tmp(FPRInfo::fpRegT1), Arg::addr(base, 1 * sizeof(double)));
@@ -1610,10 +1618,10 @@
loadDoubleConstant(root, 4, Tmp(FPRInfo::fpRegT3), Tmp(GPRInfo::regT0));
root->append(
Shuffle, nullptr,
- Tmp(FPRInfo::fpRegT2), Tmp(FPRInfo::fpRegT3), Arg::widthArg(Arg::Width64));
+ Tmp(FPRInfo::fpRegT2), Tmp(FPRInfo::fpRegT3), Arg::widthArg(Width64));
double things[4];
- Tmp base = code.newTmp(Arg::GP);
+ Tmp base = code.newTmp(GP);
root->append(Move, nullptr, Arg::bigImm(bitwise_cast<intptr_t>(&things)), base);
root->append(MoveDouble, nullptr, Tmp(FPRInfo::fpRegT0), Arg::addr(base, 0 * sizeof(double)));
root->append(MoveDouble, nullptr, Tmp(FPRInfo::fpRegT1), Arg::addr(base, 1 * sizeof(double)));
