commit 0f28f9b890b201b85e61606059514ecf4330dea3
author loki@webkit.org <loki@webkit.org@268f45cc-cd09-0410-ab3c-d52691b4dbfc> Sat Nov 20 22:02:36 2010 +0000
committer loki@webkit.org <loki@webkit.org@268f45cc-cd09-0410-ab3c-d52691b4dbfc> Sat Nov 20 22:02:36 2010 +0000
tree dddb073c71c4684d537d1f11e3b56fb71822a1ff
parent 41f2812daf66cbeb2baa09beface8d62b36e9bc8

2010-11-20  Gabor Loki  <loki@webkit.org>

        Reviewed by Gavin Barraclough.

        Support JIT_OPTIMIZE_MOD on Thumb-2
        https://bugs.webkit.org/show_bug.cgi?id=49432

        Rewrite the soft modulo operation into macroassembler form, and move it
        to JSValue32_64 section.
        Add support for soft modulo on Thumb-2 JIT also.

        * assembler/ARMv7Assembler.h:
        (JSC::ARMv7Assembler::clz):
        * assembler/MacroAssemblerARM.h:
        (JSC::MacroAssemblerARM::countLeadingZeros32):
        (JSC::MacroAssemblerARM::relativeTableJump):
        * assembler/MacroAssemblerARMv7.h:
        (JSC::MacroAssemblerARMv7::countLeadingZeros32):
        (JSC::MacroAssemblerARMv7::relativeTableJump):
        * jit/JITArithmetic.cpp:
        (JSC::JIT::emit_op_mod):
        * jit/JITOpcodes.cpp:
        (JSC::JIT::privateCompileCTIMachineTrampolines):
        * jit/JITOpcodes32_64.cpp:
        (JSC::JIT::softModulo):
        * jit/JITStubs.cpp:
        (JSC::JITThunks::JITThunks):
        * wtf/Platform.h:

git-svn-id: http://svn.webkit.org/repository/webkit/trunk@72481 268f45cc-cd09-0410-ab3c-d52691b4dbfc

JavaScriptCore/assembler/MacroAssemblerARM.h

diff --git a/JavaScriptCore/assembler/MacroAssemblerARM.h b/JavaScriptCore/assembler/MacroAssemblerARM.h
index 49c87c0..ab6104d 100644
--- a/JavaScriptCore/assembler/MacroAssemblerARM.h
+++ b/JavaScriptCore/assembler/MacroAssemblerARM.h
@@ -228,6 +228,17 @@
         m_assembler.eors_r(dest, dest, m_assembler.getImm(imm.m_value, ARMRegisters::S0));
     }
 
+    void countLeadingZeros32(RegisterID src, RegisterID dest)
+    {
+#if WTF_ARM_ARCH_AT_LEAST(5)
+        m_assembler.clz_r(dest, src);
+#else
+        UNUSED_PARAM(src);
+        UNUSED_PARAM(dest);
+        ASSERT_NOT_REACHED();
+#endif
+    }
+
     void load8(ImplicitAddress address, RegisterID dest)
     {
         m_assembler.dataTransfer32(true, dest, address.base, address.offset, true);
@@ -710,6 +721,15 @@
         return branch32(cond, ARMRegisters::S1, right);
     }
 
+    void relativeTableJump(RegisterID index, int scale)
+    {
+        ASSERT(scale >= 0 && scale <= 31);
+        m_assembler.add_r(ARMRegisters::pc, ARMRegisters::pc, m_assembler.lsl(index, scale));
+
+        // NOP the default prefetching
+        m_assembler.mov_r(ARMRegisters::r0, ARMRegisters::r0);
+    }
+
     Call call()
     {
 #if WTF_ARM_ARCH_AT_LEAST(5)