Rationalize MacroAssembler branch methods
https://bugs.webkit.org/show_bug.cgi?id=58950
Reviewed by Oliver Hunt.
The MacroAssembler currently exposes x86's weird behaviour that the 'setcc'
instruction only sets the low 8 bits of a register. Stop that.
Having done so, to clarify remove the 'set32' prefix from test & compare
instructions - these methods all now set a full 32/64 bit register (Ptr size).
The size in the function name should indicate the amount of data being compared.
Also split out the 'Condition' enum into 'RelationalCondition' and
'ResultCondition'. The former is used in binary comparison, the latter is a unary
condition check on the result of an operation.
* JavaScriptCore.xcodeproj/project.pbxproj:
* assembler/MacroAssembler.h:
(JSC::MacroAssembler::branchPtr):
(JSC::MacroAssembler::branch32):
(JSC::MacroAssembler::branch16):
(JSC::MacroAssembler::branchTestPtr):
(JSC::MacroAssembler::comparePtr):
(JSC::MacroAssembler::branchAddPtr):
(JSC::MacroAssembler::branchSubPtr):
(JSC::MacroAssembler::branchTest8):
* assembler/MacroAssemblerARM.h:
(JSC::MacroAssemblerARM::branch8):
(JSC::MacroAssemblerARM::branch32):
(JSC::MacroAssemblerARM::branch32WithUnalignedHalfWords):
(JSC::MacroAssemblerARM::branch16):
(JSC::MacroAssemblerARM::branchTest8):
(JSC::MacroAssemblerARM::branchTest32):
(JSC::MacroAssemblerARM::branchAdd32):
(JSC::MacroAssemblerARM::branchMul32):
(JSC::MacroAssemblerARM::branchSub32):
(JSC::MacroAssemblerARM::branchNeg32):
(JSC::MacroAssemblerARM::branchOr32):
(JSC::MacroAssemblerARM::compare32):
(JSC::MacroAssemblerARM::test32):
(JSC::MacroAssemblerARM::test8):
(JSC::MacroAssemblerARM::branchPtrWithPatch):
(JSC::MacroAssemblerARM::ARMCondition):
* assembler/MacroAssemblerARMv7.h:
(JSC::MacroAssemblerARMv7::branch32):
(JSC::MacroAssemblerARMv7::branch32WithUnalignedHalfWords):
(JSC::MacroAssemblerARMv7::branch16):
(JSC::MacroAssemblerARMv7::branch8):
(JSC::MacroAssemblerARMv7::branchTest32):
(JSC::MacroAssemblerARMv7::branchTest8):
(JSC::MacroAssemblerARMv7::branchAdd32):
(JSC::MacroAssemblerARMv7::branchMul32):
(JSC::MacroAssemblerARMv7::branchOr32):
(JSC::MacroAssemblerARMv7::branchSub32):
(JSC::MacroAssemblerARMv7::compare32):
(JSC::MacroAssemblerARMv7::test32):
(JSC::MacroAssemblerARMv7::test8):
(JSC::MacroAssemblerARMv7::branchPtrWithPatch):
(JSC::MacroAssemblerARMv7::makeBranch):
(JSC::MacroAssemblerARMv7::armV7Condition):
* assembler/MacroAssemblerMIPS.h:
(JSC::MacroAssemblerMIPS::branch8):
(JSC::MacroAssemblerMIPS::branch32):
(JSC::MacroAssemblerMIPS::branch32WithUnalignedHalfWords):
(JSC::MacroAssemblerMIPS::branch16):
(JSC::MacroAssemblerMIPS::branchTest32):
(JSC::MacroAssemblerMIPS::branchTest8):
(JSC::MacroAssemblerMIPS::branchAdd32):
(JSC::MacroAssemblerMIPS::branchMul32):
(JSC::MacroAssemblerMIPS::branchSub32):
(JSC::MacroAssemblerMIPS::branchOr32):
(JSC::MacroAssemblerMIPS::compare32):
(JSC::MacroAssemblerMIPS::test8):
(JSC::MacroAssemblerMIPS::test32):
(JSC::MacroAssemblerMIPS::branchPtrWithPatch):
* assembler/MacroAssemblerX86.h:
(JSC::MacroAssemblerX86::branch32):
(JSC::MacroAssemblerX86::branchPtrWithPatch):
* assembler/MacroAssemblerX86Common.h:
(JSC::MacroAssemblerX86Common::branch8):
(JSC::MacroAssemblerX86Common::branch32):
(JSC::MacroAssemblerX86Common::branch32WithUnalignedHalfWords):
(JSC::MacroAssemblerX86Common::branch16):
(JSC::MacroAssemblerX86Common::branchTest32):
(JSC::MacroAssemblerX86Common::branchTest8):
(JSC::MacroAssemblerX86Common::branchAdd32):
(JSC::MacroAssemblerX86Common::branchMul32):
(JSC::MacroAssemblerX86Common::branchSub32):
(JSC::MacroAssemblerX86Common::branchNeg32):
(JSC::MacroAssemblerX86Common::branchOr32):
(JSC::MacroAssemblerX86Common::compare32):
(JSC::MacroAssemblerX86Common::test8):
(JSC::MacroAssemblerX86Common::test32):
(JSC::MacroAssemblerX86Common::x86Condition):
* assembler/MacroAssemblerX86_64.h:
(JSC::MacroAssemblerX86_64::comparePtr):
(JSC::MacroAssemblerX86_64::branchPtr):
(JSC::MacroAssemblerX86_64::branchTestPtr):
(JSC::MacroAssemblerX86_64::branchAddPtr):
(JSC::MacroAssemblerX86_64::branchSubPtr):
(JSC::MacroAssemblerX86_64::branchPtrWithPatch):
(JSC::MacroAssemblerX86_64::branchTest8):
* dfg/DFGSpeculativeJIT.cpp:
(JSC::DFG::SpeculativeJIT::compile):
* jit/JITOpcodes.cpp:
(JSC::JIT::emit_op_eq):
(JSC::JIT::emit_op_neq):
(JSC::JIT::compileOpStrictEq):
(JSC::JIT::emit_op_eq_null):
(JSC::JIT::emit_op_neq_null):
* jit/JITOpcodes32_64.cpp:
(JSC::JIT::emit_op_eq):
(JSC::JIT::emit_op_neq):
(JSC::JIT::compileOpStrictEq):
(JSC::JIT::emit_op_eq_null):
(JSC::JIT::emit_op_neq_null):
git-svn-id: http://svn.webkit.org/repository/webkit/trunk@84399 268f45cc-cd09-0410-ab3c-d52691b4dbfc
diff --git a/Source/JavaScriptCore/assembler/MacroAssembler.h b/Source/JavaScriptCore/assembler/MacroAssembler.h
index cffb41d..b94bd0d 100644
--- a/Source/JavaScriptCore/assembler/MacroAssembler.h
+++ b/Source/JavaScriptCore/assembler/MacroAssembler.h
@@ -105,32 +105,32 @@
// Backwards banches, these are currently all implemented using existing forwards branch mechanisms.
- void branchPtr(Condition cond, RegisterID op1, TrustedImmPtr imm, Label target)
+ void branchPtr(RelationalCondition cond, RegisterID op1, TrustedImmPtr imm, Label target)
{
branchPtr(cond, op1, imm).linkTo(target, this);
}
- void branch32(Condition cond, RegisterID op1, RegisterID op2, Label target)
+ void branch32(RelationalCondition cond, RegisterID op1, RegisterID op2, Label target)
{
branch32(cond, op1, op2).linkTo(target, this);
}
- void branch32(Condition cond, RegisterID op1, TrustedImm32 imm, Label target)
+ void branch32(RelationalCondition cond, RegisterID op1, TrustedImm32 imm, Label target)
{
branch32(cond, op1, imm).linkTo(target, this);
}
- void branch32(Condition cond, RegisterID left, Address right, Label target)
+ void branch32(RelationalCondition cond, RegisterID left, Address right, Label target)
{
branch32(cond, left, right).linkTo(target, this);
}
- void branch16(Condition cond, BaseIndex left, RegisterID right, Label target)
+ void branch16(RelationalCondition cond, BaseIndex left, RegisterID right, Label target)
{
branch16(cond, left, right).linkTo(target, this);
}
- void branchTestPtr(Condition cond, RegisterID reg, Label target)
+ void branchTestPtr(ResultCondition cond, RegisterID reg, Label target)
{
branchTestPtr(cond, reg).linkTo(target, this);
}
@@ -236,9 +236,9 @@
return load32WithAddressOffsetPatch(address, dest);
}
- void setPtr(Condition cond, RegisterID left, TrustedImm32 right, RegisterID dest)
+ void comparePtr(RelationalCondition cond, RegisterID left, TrustedImm32 right, RegisterID dest)
{
- set32Compare32(cond, left, right, dest);
+ compare32(cond, left, right, dest);
}
void storePtr(RegisterID src, ImplicitAddress address)
@@ -272,73 +272,73 @@
}
- Jump branchPtr(Condition cond, RegisterID left, RegisterID right)
+ Jump branchPtr(RelationalCondition cond, RegisterID left, RegisterID right)
{
return branch32(cond, left, right);
}
- Jump branchPtr(Condition cond, RegisterID left, TrustedImmPtr right)
+ Jump branchPtr(RelationalCondition cond, RegisterID left, TrustedImmPtr right)
{
return branch32(cond, left, TrustedImm32(right));
}
- Jump branchPtr(Condition cond, RegisterID left, Address right)
+ Jump branchPtr(RelationalCondition cond, RegisterID left, Address right)
{
return branch32(cond, left, right);
}
- Jump branchPtr(Condition cond, Address left, RegisterID right)
+ Jump branchPtr(RelationalCondition cond, Address left, RegisterID right)
{
return branch32(cond, left, right);
}
- Jump branchPtr(Condition cond, AbsoluteAddress left, RegisterID right)
+ Jump branchPtr(RelationalCondition cond, AbsoluteAddress left, RegisterID right)
{
return branch32(cond, left, right);
}
- Jump branchPtr(Condition cond, Address left, TrustedImmPtr right)
+ Jump branchPtr(RelationalCondition cond, Address left, TrustedImmPtr right)
{
return branch32(cond, left, TrustedImm32(right));
}
- Jump branchPtr(Condition cond, AbsoluteAddress left, TrustedImmPtr right)
+ Jump branchPtr(RelationalCondition cond, AbsoluteAddress left, TrustedImmPtr right)
{
return branch32(cond, left, TrustedImm32(right));
}
- Jump branchTestPtr(Condition cond, RegisterID reg, RegisterID mask)
+ Jump branchTestPtr(ResultCondition cond, RegisterID reg, RegisterID mask)
{
return branchTest32(cond, reg, mask);
}
- Jump branchTestPtr(Condition cond, RegisterID reg, TrustedImm32 mask = TrustedImm32(-1))
+ Jump branchTestPtr(ResultCondition cond, RegisterID reg, TrustedImm32 mask = TrustedImm32(-1))
{
return branchTest32(cond, reg, mask);
}
- Jump branchTestPtr(Condition cond, Address address, TrustedImm32 mask = TrustedImm32(-1))
+ Jump branchTestPtr(ResultCondition cond, Address address, TrustedImm32 mask = TrustedImm32(-1))
{
return branchTest32(cond, address, mask);
}
- Jump branchTestPtr(Condition cond, BaseIndex address, TrustedImm32 mask = TrustedImm32(-1))
+ Jump branchTestPtr(ResultCondition cond, BaseIndex address, TrustedImm32 mask = TrustedImm32(-1))
{
return branchTest32(cond, address, mask);
}
- Jump branchAddPtr(Condition cond, RegisterID src, RegisterID dest)
+ Jump branchAddPtr(ResultCondition cond, RegisterID src, RegisterID dest)
{
return branchAdd32(cond, src, dest);
}
- Jump branchSubPtr(Condition cond, TrustedImm32 imm, RegisterID dest)
+ Jump branchSubPtr(ResultCondition cond, TrustedImm32 imm, RegisterID dest)
{
return branchSub32(cond, imm, dest);
}
using MacroAssemblerBase::branchTest8;
- Jump branchTest8(Condition cond, ExtendedAddress address, TrustedImm32 mask = TrustedImm32(-1))
+ Jump branchTest8(ResultCondition cond, ExtendedAddress address, TrustedImm32 mask = TrustedImm32(-1))
{
return MacroAssemblerBase::branchTest8(cond, Address(address.base, address.offset), mask);
}
diff --git a/Source/JavaScriptCore/assembler/MacroAssemblerARM.h b/Source/JavaScriptCore/assembler/MacroAssemblerARM.h
index 80f69bf..ed22587 100644
--- a/Source/JavaScriptCore/assembler/MacroAssemblerARM.h
+++ b/Source/JavaScriptCore/assembler/MacroAssemblerARM.h
@@ -42,7 +42,7 @@
public:
typedef ARMRegisters::FPRegisterID FPRegisterID;
- enum Condition {
+ enum RelationalCondition {
Equal = ARMAssembler::EQ,
NotEqual = ARMAssembler::NE,
Above = ARMAssembler::HI,
@@ -52,7 +52,10 @@
GreaterThan = ARMAssembler::GT,
GreaterThanOrEqual = ARMAssembler::GE,
LessThan = ARMAssembler::LT,
- LessThanOrEqual = ARMAssembler::LE,
+ LessThanOrEqual = ARMAssembler::LE
+ };
+
+ enum ResultCondition {
Overflow = ARMAssembler::VS,
Signed = ARMAssembler::MI,
Zero = ARMAssembler::EQ,
@@ -387,19 +390,19 @@
move(src, dest);
}
- Jump branch8(Condition cond, Address left, TrustedImm32 right)
+ Jump branch8(RelationalCondition cond, Address left, TrustedImm32 right)
{
load8(left, ARMRegisters::S1);
return branch32(cond, ARMRegisters::S1, right);
}
- Jump branch32(Condition cond, RegisterID left, RegisterID right, int useConstantPool = 0)
+ Jump branch32(RelationalCondition cond, RegisterID left, RegisterID right, int useConstantPool = 0)
{
m_assembler.cmp_r(left, right);
return Jump(m_assembler.jmp(ARMCondition(cond), useConstantPool));
}
- Jump branch32(Condition cond, RegisterID left, TrustedImm32 right, int useConstantPool = 0)
+ Jump branch32(RelationalCondition cond, RegisterID left, TrustedImm32 right, int useConstantPool = 0)
{
if (right.m_isPointer) {
m_assembler.ldr_un_imm(ARMRegisters::S0, right.m_value);
@@ -414,37 +417,37 @@
return Jump(m_assembler.jmp(ARMCondition(cond), useConstantPool));
}
- Jump branch32(Condition cond, RegisterID left, Address right)
+ Jump branch32(RelationalCondition cond, RegisterID left, Address right)
{
load32(right, ARMRegisters::S1);
return branch32(cond, left, ARMRegisters::S1);
}
- Jump branch32(Condition cond, Address left, RegisterID right)
+ Jump branch32(RelationalCondition cond, Address left, RegisterID right)
{
load32(left, ARMRegisters::S1);
return branch32(cond, ARMRegisters::S1, right);
}
- Jump branch32(Condition cond, Address left, TrustedImm32 right)
+ Jump branch32(RelationalCondition cond, Address left, TrustedImm32 right)
{
load32(left, ARMRegisters::S1);
return branch32(cond, ARMRegisters::S1, right);
}
- Jump branch32(Condition cond, BaseIndex left, TrustedImm32 right)
+ Jump branch32(RelationalCondition cond, BaseIndex left, TrustedImm32 right)
{
load32(left, ARMRegisters::S1);
return branch32(cond, ARMRegisters::S1, right);
}
- Jump branch32WithUnalignedHalfWords(Condition cond, BaseIndex left, TrustedImm32 right)
+ Jump branch32WithUnalignedHalfWords(RelationalCondition cond, BaseIndex left, TrustedImm32 right)
{
load32WithUnalignedHalfWords(left, ARMRegisters::S1);
return branch32(cond, ARMRegisters::S1, right);
}
- Jump branch16(Condition cond, BaseIndex left, RegisterID right)
+ Jump branch16(RelationalCondition cond, BaseIndex left, RegisterID right)
{
UNUSED_PARAM(cond);
UNUSED_PARAM(left);
@@ -453,7 +456,7 @@
return jump();
}
- Jump branch16(Condition cond, BaseIndex left, TrustedImm32 right)
+ Jump branch16(RelationalCondition cond, BaseIndex left, TrustedImm32 right)
{
load16(left, ARMRegisters::S0);
move(right, ARMRegisters::S1);
@@ -461,20 +464,20 @@
return m_assembler.jmp(ARMCondition(cond));
}
- Jump branchTest8(Condition cond, Address address, TrustedImm32 mask = TrustedImm32(-1))
+ Jump branchTest8(ResultCondition cond, Address address, TrustedImm32 mask = TrustedImm32(-1))
{
load8(address, ARMRegisters::S1);
return branchTest32(cond, ARMRegisters::S1, mask);
}
- Jump branchTest32(Condition cond, RegisterID reg, RegisterID mask)
+ Jump branchTest32(ResultCondition cond, RegisterID reg, RegisterID mask)
{
ASSERT((cond == Zero) || (cond == NonZero));
m_assembler.tst_r(reg, mask);
return Jump(m_assembler.jmp(ARMCondition(cond)));
}
- Jump branchTest32(Condition cond, RegisterID reg, TrustedImm32 mask = TrustedImm32(-1))
+ Jump branchTest32(ResultCondition cond, RegisterID reg, TrustedImm32 mask = TrustedImm32(-1))
{
ASSERT((cond == Zero) || (cond == NonZero));
ARMWord w = m_assembler.getImm(mask.m_value, ARMRegisters::S0, true);
@@ -485,13 +488,13 @@
return Jump(m_assembler.jmp(ARMCondition(cond)));
}
- Jump branchTest32(Condition cond, Address address, TrustedImm32 mask = TrustedImm32(-1))
+ Jump branchTest32(ResultCondition cond, Address address, TrustedImm32 mask = TrustedImm32(-1))
{
load32(address, ARMRegisters::S1);
return branchTest32(cond, ARMRegisters::S1, mask);
}
- Jump branchTest32(Condition cond, BaseIndex address, TrustedImm32 mask = TrustedImm32(-1))
+ Jump branchTest32(ResultCondition cond, BaseIndex address, TrustedImm32 mask = TrustedImm32(-1))
{
load32(address, ARMRegisters::S1);
return branchTest32(cond, ARMRegisters::S1, mask);
@@ -512,14 +515,14 @@
load32(address, ARMRegisters::pc);
}
- Jump branchAdd32(Condition cond, RegisterID src, RegisterID dest)
+ Jump branchAdd32(ResultCondition cond, RegisterID src, RegisterID dest)
{
ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero));
add32(src, dest);
return Jump(m_assembler.jmp(ARMCondition(cond)));
}
- Jump branchAdd32(Condition cond, TrustedImm32 imm, RegisterID dest)
+ Jump branchAdd32(ResultCondition cond, TrustedImm32 imm, RegisterID dest)
{
ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero));
add32(imm, dest);
@@ -536,7 +539,7 @@
m_assembler.cmp_r(ARMRegisters::S1, m_assembler.asr(dest, 31));
}
- Jump branchMul32(Condition cond, RegisterID src, RegisterID dest)
+ Jump branchMul32(ResultCondition cond, RegisterID src, RegisterID dest)
{
ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero));
if (cond == Overflow) {
@@ -548,7 +551,7 @@
return Jump(m_assembler.jmp(ARMCondition(cond)));
}
- Jump branchMul32(Condition cond, TrustedImm32 imm, RegisterID src, RegisterID dest)
+ Jump branchMul32(ResultCondition cond, TrustedImm32 imm, RegisterID src, RegisterID dest)
{
ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero));
if (cond == Overflow) {
@@ -561,28 +564,28 @@
return Jump(m_assembler.jmp(ARMCondition(cond)));
}
- Jump branchSub32(Condition cond, RegisterID src, RegisterID dest)
+ Jump branchSub32(ResultCondition cond, RegisterID src, RegisterID dest)
{
ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero));
sub32(src, dest);
return Jump(m_assembler.jmp(ARMCondition(cond)));
}
- Jump branchSub32(Condition cond, TrustedImm32 imm, RegisterID dest)
+ Jump branchSub32(ResultCondition cond, TrustedImm32 imm, RegisterID dest)
{
ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero));
sub32(imm, dest);
return Jump(m_assembler.jmp(ARMCondition(cond)));
}
- Jump branchNeg32(Condition cond, RegisterID srcDest)
+ Jump branchNeg32(ResultCondition cond, RegisterID srcDest)
{
ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero));
neg32(srcDest);
return Jump(m_assembler.jmp(ARMCondition(cond)));
}
- Jump branchOr32(Condition cond, RegisterID src, RegisterID dest)
+ Jump branchOr32(ResultCondition cond, RegisterID src, RegisterID dest)
{
ASSERT((cond == Signed) || (cond == Zero) || (cond == NonZero));
or32(src, dest);
@@ -621,40 +624,21 @@
m_assembler.bx(linkRegister);
}
- void set32Compare32(Condition cond, RegisterID left, RegisterID right, RegisterID dest)
+ void compare32(RelationalCondition cond, RegisterID left, RegisterID right, RegisterID dest)
{
m_assembler.cmp_r(left, right);
m_assembler.mov_r(dest, ARMAssembler::getOp2(0));
m_assembler.mov_r(dest, ARMAssembler::getOp2(1), ARMCondition(cond));
}
- void set32Compare32(Condition cond, RegisterID left, TrustedImm32 right, RegisterID dest)
+ void compare32(RelationalCondition cond, RegisterID left, TrustedImm32 right, RegisterID dest)
{
m_assembler.cmp_r(left, m_assembler.getImm(right.m_value, ARMRegisters::S0));
m_assembler.mov_r(dest, ARMAssembler::getOp2(0));
m_assembler.mov_r(dest, ARMAssembler::getOp2(1), ARMCondition(cond));
}
- void set8Compare32(Condition cond, RegisterID left, RegisterID right, RegisterID dest)
- {
- // ARM doesn't have byte registers
- set32Compare32(cond, left, right, dest);
- }
-
- void set8Compare32(Condition cond, Address left, RegisterID right, RegisterID dest)
- {
- // ARM doesn't have byte registers
- load32(left, ARMRegisters::S1);
- set32Compare32(cond, ARMRegisters::S1, right, dest);
- }
-
- void set8Compare32(Condition cond, RegisterID left, TrustedImm32 right, RegisterID dest)
- {
- // ARM doesn't have byte registers
- set32Compare32(cond, left, right, dest);
- }
-
- void set32Test32(Condition cond, RegisterID reg, TrustedImm32 mask, RegisterID dest)
+ void test32(ResultCondition cond, RegisterID reg, TrustedImm32 mask, RegisterID dest)
{
if (mask.m_value == -1)
m_assembler.cmp_r(0, reg);
@@ -664,13 +648,13 @@
m_assembler.mov_r(dest, ARMAssembler::getOp2(1), ARMCondition(cond));
}
- void set32Test32(Condition cond, Address address, TrustedImm32 mask, RegisterID dest)
+ void test32(ResultCondition cond, Address address, TrustedImm32 mask, RegisterID dest)
{
load32(address, ARMRegisters::S1);
- set32Test32(cond, ARMRegisters::S1, mask, dest);
+ test32(cond, ARMRegisters::S1, mask, dest);
}
- void set32Test8(Condition cond, Address address, TrustedImm32 mask, RegisterID dest)
+ void test8(ResultCondition cond, Address address, TrustedImm32 mask, RegisterID dest)
{
load8(address, ARMRegisters::S1);
set32Test32(cond, ARMRegisters::S1, mask, dest);
@@ -705,13 +689,13 @@
m_assembler.dtr_u(true, dest, ARMRegisters::S0, 0);
}
- Jump branch32(Condition cond, AbsoluteAddress left, RegisterID right)
+ Jump branch32(RelationalCondition cond, AbsoluteAddress left, RegisterID right)
{
load32(left.m_ptr, ARMRegisters::S1);
return branch32(cond, ARMRegisters::S1, right);
}
- Jump branch32(Condition cond, AbsoluteAddress left, TrustedImm32 right)
+ Jump branch32(RelationalCondition cond, AbsoluteAddress left, TrustedImm32 right)
{
load32(left.m_ptr, ARMRegisters::S1);
return branch32(cond, ARMRegisters::S1, right);
@@ -755,14 +739,14 @@
return dataLabel;
}
- Jump branchPtrWithPatch(Condition cond, RegisterID left, DataLabelPtr& dataLabel, TrustedImmPtr initialRightValue = TrustedImmPtr(0))
+ Jump branchPtrWithPatch(RelationalCondition cond, RegisterID left, DataLabelPtr& dataLabel, TrustedImmPtr initialRightValue = TrustedImmPtr(0))
{
dataLabel = moveWithPatch(initialRightValue, ARMRegisters::S1);
Jump jump = branch32(cond, left, ARMRegisters::S1, true);
return jump;
}
- Jump branchPtrWithPatch(Condition cond, Address left, DataLabelPtr& dataLabel, TrustedImmPtr initialRightValue = TrustedImmPtr(0))
+ Jump branchPtrWithPatch(RelationalCondition cond, Address left, DataLabelPtr& dataLabel, TrustedImmPtr initialRightValue = TrustedImmPtr(0))
{
load32(left, ARMRegisters::S1);
dataLabel = moveWithPatch(initialRightValue, ARMRegisters::S0);
@@ -944,7 +928,12 @@
}
protected:
- ARMAssembler::Condition ARMCondition(Condition cond)
+ ARMAssembler::Condition ARMCondition(RelationalCondition cond)
+ {
+ return static_cast<ARMAssembler::Condition>(cond);
+ }
+
+ ARMAssembler::Condition ARMCondition(ResultCondition cond)
{
return static_cast<ARMAssembler::Condition>(cond);
}
diff --git a/Source/JavaScriptCore/assembler/MacroAssemblerARMv7.h b/Source/JavaScriptCore/assembler/MacroAssemblerARMv7.h
index 84e0a5e..269139a 100644
--- a/Source/JavaScriptCore/assembler/MacroAssemblerARMv7.h
+++ b/Source/JavaScriptCore/assembler/MacroAssemblerARMv7.h
@@ -100,7 +100,7 @@
static const Scale ScalePtr = TimesFour;
- enum Condition {
+ enum RelationalCondition {
Equal = ARMv7Assembler::ConditionEQ,
NotEqual = ARMv7Assembler::ConditionNE,
Above = ARMv7Assembler::ConditionHI,
@@ -110,12 +110,16 @@
GreaterThan = ARMv7Assembler::ConditionGT,
GreaterThanOrEqual = ARMv7Assembler::ConditionGE,
LessThan = ARMv7Assembler::ConditionLT,
- LessThanOrEqual = ARMv7Assembler::ConditionLE,
+ LessThanOrEqual = ARMv7Assembler::ConditionLE
+ };
+
+ enum ResultCondition {
Overflow = ARMv7Assembler::ConditionVS,
Signed = ARMv7Assembler::ConditionMI,
Zero = ARMv7Assembler::ConditionEQ,
NonZero = ARMv7Assembler::ConditionNE
};
+
enum DoubleCondition {
// These conditions will only evaluate to true if the comparison is ordered - i.e. neither operand is NaN.
DoubleEqual = ARMv7Assembler::ConditionEQ,
@@ -865,65 +869,65 @@
}
public:
- Jump branch32(Condition cond, RegisterID left, RegisterID right)
+ Jump branch32(RelationalCondition cond, RegisterID left, RegisterID right)
{
m_assembler.cmp(left, right);
return Jump(makeBranch(cond));
}
- Jump branch32(Condition cond, RegisterID left, TrustedImm32 right)
+ Jump branch32(RelationalCondition cond, RegisterID left, TrustedImm32 right)
{
compare32(left, right);
return Jump(makeBranch(cond));
}
- Jump branch32(Condition cond, RegisterID left, Address right)
+ Jump branch32(RelationalCondition cond, RegisterID left, Address right)
{
load32(right, dataTempRegister);
return branch32(cond, left, dataTempRegister);
}
- Jump branch32(Condition cond, Address left, RegisterID right)
+ Jump branch32(RelationalCondition cond, Address left, RegisterID right)
{
load32(left, dataTempRegister);
return branch32(cond, dataTempRegister, right);
}
- Jump branch32(Condition cond, Address left, TrustedImm32 right)
+ Jump branch32(RelationalCondition cond, Address left, TrustedImm32 right)
{
// use addressTempRegister incase the branch32 we call uses dataTempRegister. :-/
load32(left, addressTempRegister);
return branch32(cond, addressTempRegister, right);
}
- Jump branch32(Condition cond, BaseIndex left, TrustedImm32 right)
+ Jump branch32(RelationalCondition cond, BaseIndex left, TrustedImm32 right)
{
// use addressTempRegister incase the branch32 we call uses dataTempRegister. :-/
load32(left, addressTempRegister);
return branch32(cond, addressTempRegister, right);
}
- Jump branch32WithUnalignedHalfWords(Condition cond, BaseIndex left, TrustedImm32 right)
+ Jump branch32WithUnalignedHalfWords(RelationalCondition cond, BaseIndex left, TrustedImm32 right)
{
// use addressTempRegister incase the branch32 we call uses dataTempRegister. :-/
load32WithUnalignedHalfWords(left, addressTempRegister);
return branch32(cond, addressTempRegister, right);
}
- Jump branch32(Condition cond, AbsoluteAddress left, RegisterID right)
+ Jump branch32(RelationalCondition cond, AbsoluteAddress left, RegisterID right)
{
load32(left.m_ptr, dataTempRegister);
return branch32(cond, dataTempRegister, right);
}
- Jump branch32(Condition cond, AbsoluteAddress left, TrustedImm32 right)
+ Jump branch32(RelationalCondition cond, AbsoluteAddress left, TrustedImm32 right)
{
// use addressTempRegister incase the branch32 we call uses dataTempRegister. :-/
load32(left.m_ptr, addressTempRegister);
return branch32(cond, addressTempRegister, right);
}
- Jump branch16(Condition cond, BaseIndex left, RegisterID right)
+ Jump branch16(RelationalCondition cond, BaseIndex left, RegisterID right)
{
load16(left, dataTempRegister);
m_assembler.lsl(addressTempRegister, right, 16);
@@ -931,7 +935,7 @@
return branch32(cond, dataTempRegister, addressTempRegister);
}
- Jump branch16(Condition cond, BaseIndex left, TrustedImm32 right)
+ Jump branch16(RelationalCondition cond, BaseIndex left, TrustedImm32 right)
{
// use addressTempRegister incase the branch32 we call uses dataTempRegister. :-/
load16(left, addressTempRegister);
@@ -939,59 +943,53 @@
return branch32(cond, addressTempRegister, TrustedImm32(right.m_value << 16));
}
- Jump branch8(Condition cond, RegisterID left, TrustedImm32 right)
+ Jump branch8(RelationalCondition cond, RegisterID left, TrustedImm32 right)
{
compare32(left, right);
return Jump(makeBranch(cond));
}
- Jump branch8(Condition cond, Address left, TrustedImm32 right)
+ Jump branch8(RelationalCondition cond, Address left, TrustedImm32 right)
{
// use addressTempRegister incase the branch8 we call uses dataTempRegister. :-/
load8(left, addressTempRegister);
return branch8(cond, addressTempRegister, right);
}
- Jump branchTest32(Condition cond, RegisterID reg, RegisterID mask)
+ Jump branchTest32(ResultCondition cond, RegisterID reg, RegisterID mask)
{
- ASSERT((cond == Zero) || (cond == NonZero));
m_assembler.tst(reg, mask);
return Jump(makeBranch(cond));
}
- Jump branchTest32(Condition cond, RegisterID reg, TrustedImm32 mask = TrustedImm32(-1))
+ Jump branchTest32(ResultCondition cond, RegisterID reg, TrustedImm32 mask = TrustedImm32(-1))
{
- ASSERT((cond == Zero) || (cond == NonZero));
test32(reg, mask);
return Jump(makeBranch(cond));
}
- Jump branchTest32(Condition cond, Address address, TrustedImm32 mask = TrustedImm32(-1))
+ Jump branchTest32(ResultCondition cond, Address address, TrustedImm32 mask = TrustedImm32(-1))
{
- ASSERT((cond == Zero) || (cond == NonZero));
// use addressTempRegister incase the branchTest32 we call uses dataTempRegister. :-/
load32(address, addressTempRegister);
return branchTest32(cond, addressTempRegister, mask);
}
- Jump branchTest32(Condition cond, BaseIndex address, TrustedImm32 mask = TrustedImm32(-1))
+ Jump branchTest32(ResultCondition cond, BaseIndex address, TrustedImm32 mask = TrustedImm32(-1))
{
- ASSERT((cond == Zero) || (cond == NonZero));
// use addressTempRegister incase the branchTest32 we call uses dataTempRegister. :-/
load32(address, addressTempRegister);
return branchTest32(cond, addressTempRegister, mask);
}
- Jump branchTest8(Condition cond, RegisterID reg, TrustedImm32 mask = TrustedImm32(-1))
+ Jump branchTest8(ResultCondition cond, RegisterID reg, TrustedImm32 mask = TrustedImm32(-1))
{
- ASSERT((cond == Zero) || (cond == NonZero));
test32(reg, mask);
return Jump(makeBranch(cond));
}
- Jump branchTest8(Condition cond, Address address, TrustedImm32 mask = TrustedImm32(-1))
+ Jump branchTest8(ResultCondition cond, Address address, TrustedImm32 mask = TrustedImm32(-1))
{
- ASSERT((cond == Zero) || (cond == NonZero));
// use addressTempRegister incase the branchTest8 we call uses dataTempRegister. :-/
load8(address, addressTempRegister);
return branchTest8(cond, addressTempRegister, mask);
@@ -1025,16 +1023,14 @@
// * jo operations branch if the (signed) arithmetic
// operation caused an overflow to occur.
- Jump branchAdd32(Condition cond, RegisterID src, RegisterID dest)
+ Jump branchAdd32(ResultCondition cond, RegisterID src, RegisterID dest)
{
- ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero));
m_assembler.add_S(dest, dest, src);
return Jump(makeBranch(cond));
}
- Jump branchAdd32(Condition cond, TrustedImm32 imm, RegisterID dest)
+ Jump branchAdd32(ResultCondition cond, TrustedImm32 imm, RegisterID dest)
{
- ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero));
ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(imm.m_value);
if (armImm.isValid())
m_assembler.add_S(dest, dest, armImm);
@@ -1045,40 +1041,43 @@
return Jump(makeBranch(cond));
}
- Jump branchMul32(Condition cond, RegisterID src, RegisterID dest)
+ Jump branchMul32(ResultCondition cond, RegisterID src1, RegisterID src2, RegisterID dest)
{
- ASSERT_UNUSED(cond, cond == Overflow);
- m_assembler.smull(dest, dataTempRegister, dest, src);
- m_assembler.asr(addressTempRegister, dest, 31);
- return branch32(NotEqual, addressTempRegister, dataTempRegister);
+ m_assembler.smull(dest, dataTempRegister, src1, src2);
+
+ if (cond == Overflow) {
+ m_assembler.asr(addressTempRegister, dest, 31);
+ return branch32(NotEqual, addressTempRegister, dataTempRegister);
+ }
+
+ return branchTest32(cond, dest);
}
- Jump branchMul32(Condition cond, TrustedImm32 imm, RegisterID src, RegisterID dest)
+ Jump branchMul32(ResultCondition cond, RegisterID src, RegisterID dest)
{
- ASSERT_UNUSED(cond, cond == Overflow);
+ return branchMul32(cond, src, dest, dest);
+ }
+
+ Jump branchMul32(ResultCondition cond, TrustedImm32 imm, RegisterID src, RegisterID dest)
+ {
move(imm, dataTempRegister);
- m_assembler.smull(dest, dataTempRegister, src, dataTempRegister);
- m_assembler.asr(addressTempRegister, dest, 31);
- return branch32(NotEqual, addressTempRegister, dataTempRegister);
+ return branchMul32(cond, dataTempRegister, src, dest);
}
- Jump branchOr32(Condition cond, RegisterID src, RegisterID dest)
+ Jump branchOr32(ResultCondition cond, RegisterID src, RegisterID dest)
{
- ASSERT((cond == Signed) || (cond == Zero) || (cond == NonZero));
m_assembler.orr_S(dest, dest, src);
return Jump(makeBranch(cond));
}
- Jump branchSub32(Condition cond, RegisterID src, RegisterID dest)
+ Jump branchSub32(ResultCondition cond, RegisterID src, RegisterID dest)
{
- ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero));
m_assembler.sub_S(dest, dest, src);
return Jump(makeBranch(cond));
}
- Jump branchSub32(Condition cond, TrustedImm32 imm, RegisterID dest)
+ Jump branchSub32(ResultCondition cond, TrustedImm32 imm, RegisterID dest)
{
- ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero));
ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(imm.m_value);
if (armImm.isValid())
m_assembler.sub_S(dest, dest, armImm);
@@ -1137,7 +1136,7 @@
m_assembler.bx(linkRegister, ARMv7Assembler::JumpFixed);
}
- void set32Compare32(Condition cond, RegisterID left, RegisterID right, RegisterID dest)
+ void compare32(RelationalCondition cond, RegisterID left, RegisterID right, RegisterID dest)
{
m_assembler.cmp(left, right);
m_assembler.it(armV7Condition(cond), false);
@@ -1145,13 +1144,13 @@
m_assembler.mov(dest, ARMThumbImmediate::makeUInt16(0));
}
- void set32Compare32(Condition cond, Address left, RegisterID right, RegisterID dest)
+ void compare32(RelationalCondition cond, Address left, RegisterID right, RegisterID dest)
{
load32(left, dataTempRegister);
- set32Compare32(cond, dataTempRegister, right, dest);
+ compare32(cond, dataTempRegister, right, dest);
}
- void set32Compare32(Condition cond, RegisterID left, TrustedImm32 right, RegisterID dest)
+ void compare32(RelationalCondition cond, RegisterID left, TrustedImm32 right, RegisterID dest)
{
compare32(left, right);
m_assembler.it(armV7Condition(cond), false);
@@ -1159,26 +1158,11 @@
m_assembler.mov(dest, ARMThumbImmediate::makeUInt16(0));
}
- void set8Compare32(Condition cond, RegisterID left, RegisterID right, RegisterID dest)
- {
- set32Compare32(cond, left, right, dest);
- }
-
- void set8Compare32(Condition cond, Address left, RegisterID right, RegisterID dest)
- {
- set32Compare32(cond, left, right, dest);
- }
-
- void set8Compare32(Condition cond, RegisterID left, TrustedImm32 right, RegisterID dest)
- {
- set32Compare32(cond, left, right, dest);
- }
-
// FIXME:
// The mask should be optional... paerhaps the argument order should be
// dest-src, operations always have a dest? ... possibly not true, considering
// asm ops like test, or pseudo ops like pop().
- void set32Test32(Condition cond, Address address, TrustedImm32 mask, RegisterID dest)
+ void test32(ResultCondition cond, Address address, TrustedImm32 mask, RegisterID dest)
{
load32(address, dataTempRegister);
test32(dataTempRegister, mask);
@@ -1187,7 +1171,7 @@
m_assembler.mov(dest, ARMThumbImmediate::makeUInt16(0));
}
- void set32Test8(Condition cond, Address address, TrustedImm32 mask, RegisterID dest)
+ void test8(ResultCondition cond, Address address, TrustedImm32 mask, RegisterID dest)
{
load8(address, dataTempRegister);
test32(dataTempRegister, mask);
@@ -1208,13 +1192,13 @@
return DataLabelPtr(this);
}
- Jump branchPtrWithPatch(Condition cond, RegisterID left, DataLabelPtr& dataLabel, TrustedImmPtr initialRightValue = TrustedImmPtr(0))
+ Jump branchPtrWithPatch(RelationalCondition cond, RegisterID left, DataLabelPtr& dataLabel, TrustedImmPtr initialRightValue = TrustedImmPtr(0))
{
dataLabel = moveWithPatch(initialRightValue, dataTempRegister);
return branch32(cond, left, dataTempRegister);
}
- Jump branchPtrWithPatch(Condition cond, Address left, DataLabelPtr& dataLabel, TrustedImmPtr initialRightValue = TrustedImmPtr(0))
+ Jump branchPtrWithPatch(RelationalCondition cond, Address left, DataLabelPtr& dataLabel, TrustedImmPtr initialRightValue = TrustedImmPtr(0))
{
load32(left, addressTempRegister);
dataLabel = moveWithPatch(initialRightValue, dataTempRegister);
@@ -1267,7 +1251,8 @@
moveFixedWidthEncoding(TrustedImm32(0), dataTempRegister);
return m_assembler.bx(dataTempRegister, inUninterruptedSequence() ? ARMv7Assembler::JumpConditionFixedSize : ARMv7Assembler::JumpCondition, cond);
}
- ARMv7Assembler::JmpSrc makeBranch(Condition cond) { return makeBranch(armV7Condition(cond)); }
+ ARMv7Assembler::JmpSrc makeBranch(RelationalCondition cond) { return makeBranch(armV7Condition(cond)); }
+ ARMv7Assembler::JmpSrc makeBranch(ResultCondition cond) { return makeBranch(armV7Condition(cond)); }
ARMv7Assembler::JmpSrc makeBranch(DoubleCondition cond) { return makeBranch(armV7Condition(cond)); }
ArmAddress setupArmAddress(BaseIndex address)
@@ -1327,7 +1312,12 @@
m_assembler.movt(dst, ARMThumbImmediate::makeUInt16(value >> 16));
}
- ARMv7Assembler::Condition armV7Condition(Condition cond)
+ ARMv7Assembler::Condition armV7Condition(RelationalCondition cond)
+ {
+ return static_cast<ARMv7Assembler::Condition>(cond);
+ }
+
+ ARMv7Assembler::Condition armV7Condition(ResultCondition cond)
{
return static_cast<ARMv7Assembler::Condition>(cond);
}
diff --git a/Source/JavaScriptCore/assembler/MacroAssemblerMIPS.h b/Source/JavaScriptCore/assembler/MacroAssemblerMIPS.h
index 1bcec38..ac39ef4 100644
--- a/Source/JavaScriptCore/assembler/MacroAssemblerMIPS.h
+++ b/Source/JavaScriptCore/assembler/MacroAssemblerMIPS.h
@@ -57,7 +57,7 @@
// FP temp register
static const FPRegisterID fpTempRegister = MIPSRegisters::f16;
- enum Condition {
+ enum RelationalCondition {
Equal,
NotEqual,
Above,
@@ -67,7 +67,10 @@
GreaterThan,
GreaterThanOrEqual,
LessThan,
- LessThanOrEqual,
+ LessThanOrEqual
+ };
+
+ enum ResultCondition {
Overflow,
Signed,
Zero,
@@ -900,7 +903,7 @@
// jz and jnz test whether the first operand is equal to zero, and take
// an optional second operand of a mask under which to perform the test.
- Jump branch8(Condition cond, Address left, TrustedImm32 right)
+ Jump branch8(RelationalCondition cond, Address left, TrustedImm32 right)
{
// Make sure the immediate value is unsigned 8 bits.
ASSERT(!(right.m_value & 0xFFFFFF00));
@@ -909,7 +912,7 @@
return branch32(cond, dataTempRegister, immTempRegister);
}
- Jump branch32(Condition cond, RegisterID left, RegisterID right)
+ Jump branch32(RelationalCondition cond, RegisterID left, RegisterID right)
{
if (cond == Equal || cond == Zero)
return branchEqual(left, right);
@@ -985,32 +988,32 @@
return Jump();
}
- Jump branch32(Condition cond, RegisterID left, TrustedImm32 right)
+ Jump branch32(RelationalCondition cond, RegisterID left, TrustedImm32 right)
{
move(right, immTempRegister);
return branch32(cond, left, immTempRegister);
}
- Jump branch32(Condition cond, RegisterID left, Address right)
+ Jump branch32(RelationalCondition cond, RegisterID left, Address right)
{
load32(right, dataTempRegister);
return branch32(cond, left, dataTempRegister);
}
- Jump branch32(Condition cond, Address left, RegisterID right)
+ Jump branch32(RelationalCondition cond, Address left, RegisterID right)
{
load32(left, dataTempRegister);
return branch32(cond, dataTempRegister, right);
}
- Jump branch32(Condition cond, Address left, TrustedImm32 right)
+ Jump branch32(RelationalCondition cond, Address left, TrustedImm32 right)
{
load32(left, dataTempRegister);
move(right, immTempRegister);
return branch32(cond, dataTempRegister, immTempRegister);
}
- Jump branch32(Condition cond, BaseIndex left, TrustedImm32 right)
+ Jump branch32(RelationalCondition cond, BaseIndex left, TrustedImm32 right)
{
load32(left, dataTempRegister);
// Be careful that the previous load32() uses immTempRegister.
@@ -1019,7 +1022,7 @@
return branch32(cond, dataTempRegister, immTempRegister);
}
- Jump branch32WithUnalignedHalfWords(Condition cond, BaseIndex left, TrustedImm32 right)
+ Jump branch32WithUnalignedHalfWords(RelationalCondition cond, BaseIndex left, TrustedImm32 right)
{
load32WithUnalignedHalfWords(left, dataTempRegister);
// Be careful that the previous load32WithUnalignedHalfWords()
@@ -1029,26 +1032,26 @@
return branch32(cond, dataTempRegister, immTempRegister);
}
- Jump branch32(Condition cond, AbsoluteAddress left, RegisterID right)
+ Jump branch32(RelationalCondition cond, AbsoluteAddress left, RegisterID right)
{
load32(left.m_ptr, dataTempRegister);
return branch32(cond, dataTempRegister, right);
}
- Jump branch32(Condition cond, AbsoluteAddress left, TrustedImm32 right)
+ Jump branch32(RelationalCondition cond, AbsoluteAddress left, TrustedImm32 right)
{
load32(left.m_ptr, dataTempRegister);
move(right, immTempRegister);
return branch32(cond, dataTempRegister, immTempRegister);
}
- Jump branch16(Condition cond, BaseIndex left, RegisterID right)
+ Jump branch16(RelationalCondition cond, BaseIndex left, RegisterID right)
{
load16(left, dataTempRegister);
return branch32(cond, dataTempRegister, right);
}
- Jump branch16(Condition cond, BaseIndex left, TrustedImm32 right)
+ Jump branch16(RelationalCondition cond, BaseIndex left, TrustedImm32 right)
{
ASSERT(!(right.m_value & 0xFFFF0000));
load16(left, dataTempRegister);
@@ -1058,7 +1061,7 @@
return branch32(cond, dataTempRegister, immTempRegister);
}
- Jump branchTest32(Condition cond, RegisterID reg, RegisterID mask)
+ Jump branchTest32(ResultCondition cond, RegisterID reg, RegisterID mask)
{
ASSERT((cond == Zero) || (cond == NonZero));
m_assembler.andInsn(cmpTempRegister, reg, mask);
@@ -1067,7 +1070,7 @@
return branchNotEqual(cmpTempRegister, MIPSRegisters::zero);
}
- Jump branchTest32(Condition cond, RegisterID reg, TrustedImm32 mask = TrustedImm32(-1))
+ Jump branchTest32(ResultCondition cond, RegisterID reg, TrustedImm32 mask = TrustedImm32(-1))
{
ASSERT((cond == Zero) || (cond == NonZero));
if (mask.m_value == -1 && !m_fixedWidth) {
@@ -1079,19 +1082,19 @@
return branchTest32(cond, reg, immTempRegister);
}
- Jump branchTest32(Condition cond, Address address, TrustedImm32 mask = TrustedImm32(-1))
+ Jump branchTest32(ResultCondition cond, Address address, TrustedImm32 mask = TrustedImm32(-1))
{
load32(address, dataTempRegister);
return branchTest32(cond, dataTempRegister, mask);
}
- Jump branchTest32(Condition cond, BaseIndex address, TrustedImm32 mask = TrustedImm32(-1))
+ Jump branchTest32(ResultCondition cond, BaseIndex address, TrustedImm32 mask = TrustedImm32(-1))
{
load32(address, dataTempRegister);
return branchTest32(cond, dataTempRegister, mask);
}
- Jump branchTest8(Condition cond, Address address, TrustedImm32 mask = TrustedImm32(-1))
+ Jump branchTest8(ResultCondition cond, Address address, TrustedImm32 mask = TrustedImm32(-1))
{
load8(address, dataTempRegister);
return branchTest32(cond, dataTempRegister, mask);
@@ -1127,7 +1130,7 @@
// * jo operations branch if the (signed) arithmetic
// operation caused an overflow to occur.
- Jump branchAdd32(Condition cond, RegisterID src, RegisterID dest)
+ Jump branchAdd32(ResultCondition cond, RegisterID src, RegisterID dest)
{
ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero));
if (cond == Overflow) {
@@ -1174,13 +1177,13 @@
return Jump();
}
- Jump branchAdd32(Condition cond, TrustedImm32 imm, RegisterID dest)
+ Jump branchAdd32(ResultCondition cond, TrustedImm32 imm, RegisterID dest)
{
move(imm, immTempRegister);
return branchAdd32(cond, immTempRegister, dest);
}
- Jump branchMul32(Condition cond, RegisterID src, RegisterID dest)
+ Jump branchMul32(ResultCondition cond, RegisterID src, RegisterID dest)
{
ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero));
if (cond == Overflow) {
@@ -1225,14 +1228,14 @@
return Jump();
}
- Jump branchMul32(Condition cond, TrustedImm32 imm, RegisterID src, RegisterID dest)
+ Jump branchMul32(ResultCondition cond, TrustedImm32 imm, RegisterID src, RegisterID dest)
{
move(imm, immTempRegister);
move(src, dest);
return branchMul32(cond, immTempRegister, dest);
}
- Jump branchSub32(Condition cond, RegisterID src, RegisterID dest)
+ Jump branchSub32(ResultCondition cond, RegisterID src, RegisterID dest)
{
ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero));
if (cond == Overflow) {
@@ -1279,13 +1282,13 @@
return Jump();
}
- Jump branchSub32(Condition cond, TrustedImm32 imm, RegisterID dest)
+ Jump branchSub32(ResultCondition cond, TrustedImm32 imm, RegisterID dest)
{
move(imm, immTempRegister);
return branchSub32(cond, immTempRegister, dest);
}
- Jump branchOr32(Condition cond, RegisterID src, RegisterID dest)
+ Jump branchOr32(ResultCondition cond, RegisterID src, RegisterID dest)
{
ASSERT((cond == Signed) || (cond == Zero) || (cond == NonZero));
if (cond == Signed) {
@@ -1355,18 +1358,7 @@
m_assembler.nop();
}
- void set8Compare32(Condition cond, RegisterID left, RegisterID right, RegisterID dest)
- {
- set32Compare32(cond, left, right, dest);
- }
-
- void set8Compare32(Condition cond, RegisterID left, TrustedImm32 right, RegisterID dest)
- {
- move(right, immTempRegister);
- set32Compare32(cond, left, immTempRegister, dest);
- }
-
- void set32Compare32(Condition cond, RegisterID left, RegisterID right, RegisterID dest)
+ void compare32(RelationalCondition cond, RegisterID left, RegisterID right, RegisterID dest)
{
if (cond == Equal || cond == Zero) {
m_assembler.xorInsn(dest, left, right);
@@ -1417,13 +1409,13 @@
}
}
- void set32Compare32(Condition cond, RegisterID left, TrustedImm32 right, RegisterID dest)
+ void compare32(RelationalCondition cond, RegisterID left, TrustedImm32 right, RegisterID dest)
{
move(right, immTempRegister);
- set32Compare32(cond, left, immTempRegister, dest);
+ compare32(cond, left, immTempRegister, dest);
}
- void set32Test8(Condition cond, Address address, TrustedImm32 mask, RegisterID dest)
+ void test8(ResultCondition cond, Address address, TrustedImm32 mask, RegisterID dest)
{
ASSERT((cond == Zero) || (cond == NonZero));
load8(address, dataTempRegister);
@@ -1443,7 +1435,7 @@
}
}
- void set32Test32(Condition cond, Address address, TrustedImm32 mask, RegisterID dest)
+ void test32(ResultCondition cond, Address address, TrustedImm32 mask, RegisterID dest)
{
ASSERT((cond == Zero) || (cond == NonZero));
load32(address, dataTempRegister);
@@ -1481,7 +1473,7 @@
return label;
}
- Jump branchPtrWithPatch(Condition cond, RegisterID left, DataLabelPtr& dataLabel, TrustedImmPtr initialRightValue = TrustedImmPtr(0))
+ Jump branchPtrWithPatch(RelationalCondition cond, RegisterID left, DataLabelPtr& dataLabel, TrustedImmPtr initialRightValue = TrustedImmPtr(0))
{
m_fixedWidth = true;
dataLabel = moveWithPatch(initialRightValue, immTempRegister);
@@ -1490,7 +1482,7 @@
return temp;
}
- Jump branchPtrWithPatch(Condition cond, Address left, DataLabelPtr& dataLabel, TrustedImmPtr initialRightValue = TrustedImmPtr(0))
+ Jump branchPtrWithPatch(RelationalCondition cond, Address left, DataLabelPtr& dataLabel, TrustedImmPtr initialRightValue = TrustedImmPtr(0))
{
m_fixedWidth = true;
load32(left, dataTempRegister);
diff --git a/Source/JavaScriptCore/assembler/MacroAssemblerX86.h b/Source/JavaScriptCore/assembler/MacroAssemblerX86.h
index b180e2b..a1657e6 100644
--- a/Source/JavaScriptCore/assembler/MacroAssemblerX86.h
+++ b/Source/JavaScriptCore/assembler/MacroAssemblerX86.h
@@ -108,13 +108,13 @@
m_assembler.movl_rm(src, address);
}
- Jump branch32(Condition cond, AbsoluteAddress left, RegisterID right)
+ Jump branch32(RelationalCondition cond, AbsoluteAddress left, RegisterID right)
{
m_assembler.cmpl_rm(right, left.m_ptr);
return Jump(m_assembler.jCC(x86Condition(cond)));
}
- Jump branch32(Condition cond, AbsoluteAddress left, TrustedImm32 right)
+ Jump branch32(RelationalCondition cond, AbsoluteAddress left, TrustedImm32 right)
{
m_assembler.cmpl_im(right.m_value, left.m_ptr);
return Jump(m_assembler.jCC(x86Condition(cond)));
@@ -142,14 +142,14 @@
return DataLabelPtr(this);
}
- Jump branchPtrWithPatch(Condition cond, RegisterID left, DataLabelPtr& dataLabel, TrustedImmPtr initialRightValue = TrustedImmPtr(0))
+ Jump branchPtrWithPatch(RelationalCondition cond, RegisterID left, DataLabelPtr& dataLabel, TrustedImmPtr initialRightValue = TrustedImmPtr(0))
{
m_assembler.cmpl_ir_force32(initialRightValue.asIntptr(), left);
dataLabel = DataLabelPtr(this);
return Jump(m_assembler.jCC(x86Condition(cond)));
}
- Jump branchPtrWithPatch(Condition cond, Address left, DataLabelPtr& dataLabel, TrustedImmPtr initialRightValue = TrustedImmPtr(0))
+ Jump branchPtrWithPatch(RelationalCondition cond, Address left, DataLabelPtr& dataLabel, TrustedImmPtr initialRightValue = TrustedImmPtr(0))
{
m_assembler.cmpl_im_force32(initialRightValue.asIntptr(), left.offset, left.base);
dataLabel = DataLabelPtr(this);
diff --git a/Source/JavaScriptCore/assembler/MacroAssemblerX86Common.h b/Source/JavaScriptCore/assembler/MacroAssemblerX86Common.h
index 027a4ce..64e1525 100644
--- a/Source/JavaScriptCore/assembler/MacroAssemblerX86Common.h
+++ b/Source/JavaScriptCore/assembler/MacroAssemblerX86Common.h
@@ -41,7 +41,7 @@
public:
typedef X86Assembler::FPRegisterID FPRegisterID;
- enum Condition {
+ enum RelationalCondition {
Equal = X86Assembler::ConditionE,
NotEqual = X86Assembler::ConditionNE,
Above = X86Assembler::ConditionA,
@@ -51,7 +51,10 @@
GreaterThan = X86Assembler::ConditionG,
GreaterThanOrEqual = X86Assembler::ConditionGE,
LessThan = X86Assembler::ConditionL,
- LessThanOrEqual = X86Assembler::ConditionLE,
+ LessThanOrEqual = X86Assembler::ConditionLE
+ };
+
+ enum ResultCondition {
Overflow = X86Assembler::ConditionO,
Signed = X86Assembler::ConditionS,
Zero = X86Assembler::ConditionE,
@@ -794,19 +797,19 @@
// an optional second operand of a mask under which to perform the test.
public:
- Jump branch8(Condition cond, Address left, TrustedImm32 right)
+ Jump branch8(RelationalCondition cond, Address left, TrustedImm32 right)
{
m_assembler.cmpb_im(right.m_value, left.offset, left.base);
return Jump(m_assembler.jCC(x86Condition(cond)));
}
- Jump branch32(Condition cond, RegisterID left, RegisterID right)
+ Jump branch32(RelationalCondition cond, RegisterID left, RegisterID right)
{
m_assembler.cmpl_rr(right, left);
return Jump(m_assembler.jCC(x86Condition(cond)));
}
- Jump branch32(Condition cond, RegisterID left, TrustedImm32 right)
+ Jump branch32(RelationalCondition cond, RegisterID left, TrustedImm32 right)
{
if (((cond == Equal) || (cond == NotEqual)) && !right.m_value)
m_assembler.testl_rr(left, left);
@@ -815,42 +818,42 @@
return Jump(m_assembler.jCC(x86Condition(cond)));
}
- Jump branch32(Condition cond, RegisterID left, Address right)
+ Jump branch32(RelationalCondition cond, RegisterID left, Address right)
{
m_assembler.cmpl_mr(right.offset, right.base, left);
return Jump(m_assembler.jCC(x86Condition(cond)));
}
- Jump branch32(Condition cond, Address left, RegisterID right)
+ Jump branch32(RelationalCondition cond, Address left, RegisterID right)
{
m_assembler.cmpl_rm(right, left.offset, left.base);
return Jump(m_assembler.jCC(x86Condition(cond)));
}
- Jump branch32(Condition cond, Address left, TrustedImm32 right)
+ Jump branch32(RelationalCondition cond, Address left, TrustedImm32 right)
{
m_assembler.cmpl_im(right.m_value, left.offset, left.base);
return Jump(m_assembler.jCC(x86Condition(cond)));
}
- Jump branch32(Condition cond, BaseIndex left, TrustedImm32 right)
+ Jump branch32(RelationalCondition cond, BaseIndex left, TrustedImm32 right)
{
m_assembler.cmpl_im(right.m_value, left.offset, left.base, left.index, left.scale);
return Jump(m_assembler.jCC(x86Condition(cond)));
}
- Jump branch32WithUnalignedHalfWords(Condition cond, BaseIndex left, TrustedImm32 right)
+ Jump branch32WithUnalignedHalfWords(RelationalCondition cond, BaseIndex left, TrustedImm32 right)
{
return branch32(cond, left, right);
}
- Jump branch16(Condition cond, BaseIndex left, RegisterID right)
+ Jump branch16(RelationalCondition cond, BaseIndex left, RegisterID right)
{
m_assembler.cmpw_rm(right, left.offset, left.base, left.index, left.scale);
return Jump(m_assembler.jCC(x86Condition(cond)));
}
- Jump branch16(Condition cond, BaseIndex left, TrustedImm32 right)
+ Jump branch16(RelationalCondition cond, BaseIndex left, TrustedImm32 right)
{
ASSERT(!(right.m_value & 0xFFFF0000));
@@ -858,16 +861,14 @@
return Jump(m_assembler.jCC(x86Condition(cond)));
}
- Jump branchTest32(Condition cond, RegisterID reg, RegisterID mask)
+ Jump branchTest32(ResultCondition cond, RegisterID reg, RegisterID mask)
{
- ASSERT((cond == Zero) || (cond == NonZero) || (cond == Signed));
m_assembler.testl_rr(reg, mask);
return Jump(m_assembler.jCC(x86Condition(cond)));
}
- Jump branchTest32(Condition cond, RegisterID reg, TrustedImm32 mask = TrustedImm32(-1))
+ Jump branchTest32(ResultCondition cond, RegisterID reg, TrustedImm32 mask = TrustedImm32(-1))
{
- ASSERT((cond == Zero) || (cond == NonZero) || (cond == Signed));
// if we are only interested in the low seven bits, this can be tested with a testb
if (mask.m_value == -1)
m_assembler.testl_rr(reg, reg);
@@ -878,9 +879,8 @@
return Jump(m_assembler.jCC(x86Condition(cond)));
}
- Jump branchTest32(Condition cond, Address address, TrustedImm32 mask = TrustedImm32(-1))
+ Jump branchTest32(ResultCondition cond, Address address, TrustedImm32 mask = TrustedImm32(-1))
{
- ASSERT((cond == Zero) || (cond == NonZero) || (cond == Signed));
if (mask.m_value == -1)
m_assembler.cmpl_im(0, address.offset, address.base);
else
@@ -888,9 +888,8 @@
return Jump(m_assembler.jCC(x86Condition(cond)));
}
- Jump branchTest32(Condition cond, BaseIndex address, TrustedImm32 mask = TrustedImm32(-1))
+ Jump branchTest32(ResultCondition cond, BaseIndex address, TrustedImm32 mask = TrustedImm32(-1))
{
- ASSERT((cond == Zero) || (cond == NonZero) || (cond == Signed));
if (mask.m_value == -1)
m_assembler.cmpl_im(0, address.offset, address.base, address.index, address.scale);
else
@@ -898,11 +897,10 @@
return Jump(m_assembler.jCC(x86Condition(cond)));
}
- Jump branchTest8(Condition cond, RegisterID reg, TrustedImm32 mask = TrustedImm32(-1))
+ Jump branchTest8(ResultCondition cond, RegisterID reg, TrustedImm32 mask = TrustedImm32(-1))
{
// Byte in TrustedImm32 is not well defined, so be a little permisive here, but don't accept nonsense values.
ASSERT(mask.m_value >= -128 && mask.m_value <= 255);
- ASSERT((cond == Zero) || (cond == NonZero) || (cond == Signed));
if (mask.m_value == -1)
m_assembler.testb_rr(reg, reg);
else
@@ -910,11 +908,10 @@
return Jump(m_assembler.jCC(x86Condition(cond)));
}
- Jump branchTest8(Condition cond, Address address, TrustedImm32 mask = TrustedImm32(-1))
+ Jump branchTest8(ResultCondition cond, Address address, TrustedImm32 mask = TrustedImm32(-1))
{
// Byte in TrustedImm32 is not well defined, so be a little permisive here, but don't accept nonsense values.
ASSERT(mask.m_value >= -128 && mask.m_value <= 255);
- ASSERT((cond == Zero) || (cond == NonZero) || (cond == Signed));
if (mask.m_value == -1)
m_assembler.cmpb_im(0, address.offset, address.base);
else
@@ -922,11 +919,10 @@
return Jump(m_assembler.jCC(x86Condition(cond)));
}
- Jump branchTest8(Condition cond, BaseIndex address, TrustedImm32 mask = TrustedImm32(-1))
+ Jump branchTest8(ResultCondition cond, BaseIndex address, TrustedImm32 mask = TrustedImm32(-1))
{
// Byte in TrustedImm32 is not well defined, so be a little permisive here, but don't accept nonsense values.
ASSERT(mask.m_value >= -128 && mask.m_value <= 255);
- ASSERT((cond == Zero) || (cond == NonZero) || (cond == Signed));
if (mask.m_value == -1)
m_assembler.cmpb_im(0, address.offset, address.base, address.index, address.scale);
else
@@ -961,42 +957,37 @@
// * jo operations branch if the (signed) arithmetic
// operation caused an overflow to occur.
- Jump branchAdd32(Condition cond, RegisterID src, RegisterID dest)
+ Jump branchAdd32(ResultCondition cond, RegisterID src, RegisterID dest)
{
- ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero));
add32(src, dest);
return Jump(m_assembler.jCC(x86Condition(cond)));
}
- Jump branchAdd32(Condition cond, TrustedImm32 imm, RegisterID dest)
+ Jump branchAdd32(ResultCondition cond, TrustedImm32 imm, RegisterID dest)
{
- ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero));
add32(imm, dest);
return Jump(m_assembler.jCC(x86Condition(cond)));
}
- Jump branchAdd32(Condition cond, TrustedImm32 src, Address dest)
+ Jump branchAdd32(ResultCondition cond, TrustedImm32 src, Address dest)
{
- ASSERT((cond == Overflow) || (cond == Zero) || (cond == NonZero));
add32(src, dest);
return Jump(m_assembler.jCC(x86Condition(cond)));
}
- Jump branchAdd32(Condition cond, RegisterID src, Address dest)
+ Jump branchAdd32(ResultCondition cond, RegisterID src, Address dest)
{
- ASSERT((cond == Overflow) || (cond == Zero) || (cond == NonZero));
add32(src, dest);
return Jump(m_assembler.jCC(x86Condition(cond)));
}
- Jump branchAdd32(Condition cond, Address src, RegisterID dest)
+ Jump branchAdd32(ResultCondition cond, Address src, RegisterID dest)
{
- ASSERT((cond == Overflow) || (cond == Zero) || (cond == NonZero));
add32(src, dest);
return Jump(m_assembler.jCC(x86Condition(cond)));
}
- Jump branchAdd32(Condition cond, RegisterID src1, RegisterID src2, RegisterID dest)
+ Jump branchAdd32(ResultCondition cond, RegisterID src1, RegisterID src2, RegisterID dest)
{
if (src1 == dest)
return branchAdd32(cond, src2, dest);
@@ -1004,34 +995,37 @@
return branchAdd32(cond, src1, dest);
}
- Jump branchAdd32(Condition cond, RegisterID src, TrustedImm32 imm, RegisterID dest)
+ Jump branchAdd32(ResultCondition cond, RegisterID src, TrustedImm32 imm, RegisterID dest)
{
move(src, dest);
return branchAdd32(cond, imm, dest);
}
- Jump branchMul32(Condition cond, RegisterID src, RegisterID dest)
+ Jump branchMul32(ResultCondition cond, RegisterID src, RegisterID dest)
{
- ASSERT(cond == Overflow);
mul32(src, dest);
+ if (cond != Overflow)
+ m_assembler.testl_rr(dest, dest);
return Jump(m_assembler.jCC(x86Condition(cond)));
}
- Jump branchMul32(Condition cond, Address src, RegisterID dest)
+ Jump branchMul32(ResultCondition cond, Address src, RegisterID dest)
{
- ASSERT((cond == Overflow) || (cond == Zero) || (cond == NonZero));
mul32(src, dest);
+ if (cond != Overflow)
+ m_assembler.testl_rr(dest, dest);
return Jump(m_assembler.jCC(x86Condition(cond)));
}
- Jump branchMul32(Condition cond, TrustedImm32 imm, RegisterID src, RegisterID dest)
+ Jump branchMul32(ResultCondition cond, TrustedImm32 imm, RegisterID src, RegisterID dest)
{
- ASSERT(cond == Overflow);
mul32(imm, src, dest);
+ if (cond != Overflow)
+ m_assembler.testl_rr(dest, dest);
return Jump(m_assembler.jCC(x86Condition(cond)));
}
- Jump branchMul32(Condition cond, RegisterID src1, RegisterID src2, RegisterID dest)
+ Jump branchMul32(ResultCondition cond, RegisterID src1, RegisterID src2, RegisterID dest)
{
if (src1 == dest)
return branchMul32(cond, src2, dest);
@@ -1039,42 +1033,37 @@
return branchMul32(cond, src1, dest);
}
- Jump branchSub32(Condition cond, RegisterID src, RegisterID dest)
+ Jump branchSub32(ResultCondition cond, RegisterID src, RegisterID dest)
{
- ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero));
sub32(src, dest);
return Jump(m_assembler.jCC(x86Condition(cond)));
}
- Jump branchSub32(Condition cond, TrustedImm32 imm, RegisterID dest)
+ Jump branchSub32(ResultCondition cond, TrustedImm32 imm, RegisterID dest)
{
- ASSERT((cond == Overflow) || (cond == Signed) || (cond == Zero) || (cond == NonZero));
sub32(imm, dest);
return Jump(m_assembler.jCC(x86Condition(cond)));
}
- Jump branchSub32(Condition cond, TrustedImm32 imm, Address dest)
+ Jump branchSub32(ResultCondition cond, TrustedImm32 imm, Address dest)
{
- ASSERT((cond == Overflow) || (cond == Zero) || (cond == NonZero));
sub32(imm, dest);
return Jump(m_assembler.jCC(x86Condition(cond)));
}
- Jump branchSub32(Condition cond, RegisterID src, Address dest)
+ Jump branchSub32(ResultCondition cond, RegisterID src, Address dest)
{
- ASSERT((cond == Overflow) || (cond == Zero) || (cond == NonZero));
sub32(src, dest);
return Jump(m_assembler.jCC(x86Condition(cond)));
}
- Jump branchSub32(Condition cond, Address src, RegisterID dest)
+ Jump branchSub32(ResultCondition cond, Address src, RegisterID dest)
{
- ASSERT((cond == Overflow) || (cond == Zero) || (cond == NonZero));
sub32(src, dest);
return Jump(m_assembler.jCC(x86Condition(cond)));
}
- Jump branchSub32(Condition cond, RegisterID src1, RegisterID src2, RegisterID dest)
+ Jump branchSub32(ResultCondition cond, RegisterID src1, RegisterID src2, RegisterID dest)
{
// B := A - B is invalid.
ASSERT(src1 == dest || src2 != dest);
@@ -1083,22 +1072,20 @@
return branchSub32(cond, src2, dest);
}
- Jump branchSub32(Condition cond, RegisterID src1, TrustedImm32 src2, RegisterID dest)
+ Jump branchSub32(ResultCondition cond, RegisterID src1, TrustedImm32 src2, RegisterID dest)
{
move(src1, dest);
return branchSub32(cond, src2, dest);
}
- Jump branchNeg32(Condition cond, RegisterID srcDest)
+ Jump branchNeg32(ResultCondition cond, RegisterID srcDest)
{
- ASSERT((cond == Overflow) || (cond == Zero) || (cond == NonZero));
neg32(srcDest);
return Jump(m_assembler.jCC(x86Condition(cond)));
}
- Jump branchOr32(Condition cond, RegisterID src, RegisterID dest)
+ Jump branchOr32(ResultCondition cond, RegisterID src, RegisterID dest)
{
- ASSERT((cond == Signed) || (cond == Zero) || (cond == NonZero));
or32(src, dest);
return Jump(m_assembler.jCC(x86Condition(cond)));
}
@@ -1131,35 +1118,14 @@
m_assembler.ret();
}
- void set8Compare32(Condition cond, RegisterID left, RegisterID right, RegisterID dest)
- {
- m_assembler.cmpl_rr(right, left);
- m_assembler.setCC_r(x86Condition(cond), dest);
- }
-
- void set8Compare32(Condition cond, Address left, RegisterID right, RegisterID dest)
- {
- m_assembler.cmpl_mr(left.offset, left.base, right);
- m_assembler.setCC_r(x86Condition(cond), dest);
- }
-
- void set8Compare32(Condition cond, RegisterID left, TrustedImm32 right, RegisterID dest)
- {
- if (((cond == Equal) || (cond == NotEqual)) && !right.m_value)
- m_assembler.testl_rr(left, left);
- else
- m_assembler.cmpl_ir(right.m_value, left);
- m_assembler.setCC_r(x86Condition(cond), dest);
- }
-
- void set32Compare32(Condition cond, RegisterID left, RegisterID right, RegisterID dest)
+ void compare32(RelationalCondition cond, RegisterID left, RegisterID right, RegisterID dest)
{
m_assembler.cmpl_rr(right, left);
m_assembler.setCC_r(x86Condition(cond), dest);
m_assembler.movzbl_rr(dest, dest);
}
- void set32Compare32(Condition cond, RegisterID left, TrustedImm32 right, RegisterID dest)
+ void compare32(RelationalCondition cond, RegisterID left, TrustedImm32 right, RegisterID dest)
{
if (((cond == Equal) || (cond == NotEqual)) && !right.m_value)
m_assembler.testl_rr(left, left);
@@ -1174,7 +1140,7 @@
// dest-src, operations always have a dest? ... possibly not true, considering
// asm ops like test, or pseudo ops like pop().
- void set32Test8(Condition cond, Address address, TrustedImm32 mask, RegisterID dest)
+ void test8(ResultCondition cond, Address address, TrustedImm32 mask, RegisterID dest)
{
if (mask.m_value == -1)
m_assembler.cmpb_im(0, address.offset, address.base);
@@ -1184,7 +1150,7 @@
m_assembler.movzbl_rr(dest, dest);
}
- void set32Test32(Condition cond, Address address, TrustedImm32 mask, RegisterID dest)
+ void test32(ResultCondition cond, Address address, TrustedImm32 mask, RegisterID dest)
{
if (mask.m_value == -1)
m_assembler.cmpl_im(0, address.offset, address.base);
@@ -1195,7 +1161,12 @@
}
protected:
- X86Assembler::Condition x86Condition(Condition cond)
+ X86Assembler::Condition x86Condition(RelationalCondition cond)
+ {
+ return static_cast<X86Assembler::Condition>(cond);
+ }
+
+ X86Assembler::Condition x86Condition(ResultCondition cond)
{
return static_cast<X86Assembler::Condition>(cond);
}
diff --git a/Source/JavaScriptCore/assembler/MacroAssemblerX86_64.h b/Source/JavaScriptCore/assembler/MacroAssemblerX86_64.h
index 30c717f..9071030 100644
--- a/Source/JavaScriptCore/assembler/MacroAssemblerX86_64.h
+++ b/Source/JavaScriptCore/assembler/MacroAssemblerX86_64.h
@@ -312,7 +312,7 @@
m_assembler.movq_rr(src, dest);
}
- void setPtr(Condition cond, RegisterID left, TrustedImm32 right, RegisterID dest)
+ void comparePtr(RelationalCondition cond, RegisterID left, TrustedImm32 right, RegisterID dest)
{
if (((cond == Equal) || (cond == NotEqual)) && !right.m_value)
m_assembler.testq_rr(left, left);
@@ -322,49 +322,49 @@
m_assembler.movzbl_rr(dest, dest);
}
- Jump branchPtr(Condition cond, RegisterID left, RegisterID right)
+ Jump branchPtr(RelationalCondition cond, RegisterID left, RegisterID right)
{
m_assembler.cmpq_rr(right, left);
return Jump(m_assembler.jCC(x86Condition(cond)));
}
- Jump branchPtr(Condition cond, RegisterID left, TrustedImmPtr right)
+ Jump branchPtr(RelationalCondition cond, RegisterID left, TrustedImmPtr right)
{
move(right, scratchRegister);
return branchPtr(cond, left, scratchRegister);
}
- Jump branchPtr(Condition cond, RegisterID left, Address right)
+ Jump branchPtr(RelationalCondition cond, RegisterID left, Address right)
{
m_assembler.cmpq_mr(right.offset, right.base, left);
return Jump(m_assembler.jCC(x86Condition(cond)));
}
- Jump branchPtr(Condition cond, AbsoluteAddress left, RegisterID right)
+ Jump branchPtr(RelationalCondition cond, AbsoluteAddress left, RegisterID right)
{
move(TrustedImmPtr(left.m_ptr), scratchRegister);
return branchPtr(cond, Address(scratchRegister), right);
}
- Jump branchPtr(Condition cond, Address left, RegisterID right)
+ Jump branchPtr(RelationalCondition cond, Address left, RegisterID right)
{
m_assembler.cmpq_rm(right, left.offset, left.base);
return Jump(m_assembler.jCC(x86Condition(cond)));
}
- Jump branchPtr(Condition cond, Address left, TrustedImmPtr right)
+ Jump branchPtr(RelationalCondition cond, Address left, TrustedImmPtr right)
{
move(right, scratchRegister);
return branchPtr(cond, left, scratchRegister);
}
- Jump branchTestPtr(Condition cond, RegisterID reg, RegisterID mask)
+ Jump branchTestPtr(ResultCondition cond, RegisterID reg, RegisterID mask)
{
m_assembler.testq_rr(reg, mask);
return Jump(m_assembler.jCC(x86Condition(cond)));
}
- Jump branchTestPtr(Condition cond, RegisterID reg, TrustedImm32 mask = TrustedImm32(-1))
+ Jump branchTestPtr(ResultCondition cond, RegisterID reg, TrustedImm32 mask = TrustedImm32(-1))
{
// if we are only interested in the low seven bits, this can be tested with a testb
if (mask.m_value == -1)
@@ -376,13 +376,13 @@
return Jump(m_assembler.jCC(x86Condition(cond)));
}
- Jump branchTestPtr(Condition cond, AbsoluteAddress address, TrustedImm32 mask = TrustedImm32(-1))
+ Jump branchTestPtr(ResultCondition cond, AbsoluteAddress address, TrustedImm32 mask = TrustedImm32(-1))
{
loadPtr(address.m_ptr, scratchRegister);
return branchTestPtr(cond, scratchRegister, mask);
}
- Jump branchTestPtr(Condition cond, Address address, TrustedImm32 mask = TrustedImm32(-1))
+ Jump branchTestPtr(ResultCondition cond, Address address, TrustedImm32 mask = TrustedImm32(-1))
{
if (mask.m_value == -1)
m_assembler.cmpq_im(0, address.offset, address.base);
@@ -391,7 +391,7 @@
return Jump(m_assembler.jCC(x86Condition(cond)));
}
- Jump branchTestPtr(Condition cond, BaseIndex address, TrustedImm32 mask = TrustedImm32(-1))
+ Jump branchTestPtr(ResultCondition cond, BaseIndex address, TrustedImm32 mask = TrustedImm32(-1))
{
if (mask.m_value == -1)
m_assembler.cmpq_im(0, address.offset, address.base, address.index, address.scale);
@@ -401,16 +401,14 @@
}
- Jump branchAddPtr(Condition cond, RegisterID src, RegisterID dest)
+ Jump branchAddPtr(ResultCondition cond, RegisterID src, RegisterID dest)
{
- ASSERT((cond == Overflow) || (cond == Zero) || (cond == NonZero));
addPtr(src, dest);
return Jump(m_assembler.jCC(x86Condition(cond)));
}
- Jump branchSubPtr(Condition cond, TrustedImm32 imm, RegisterID dest)
+ Jump branchSubPtr(ResultCondition cond, TrustedImm32 imm, RegisterID dest)
{
- ASSERT((cond == Overflow) || (cond == Zero) || (cond == NonZero));
subPtr(imm, dest);
return Jump(m_assembler.jCC(x86Condition(cond)));
}
@@ -421,13 +419,13 @@
return DataLabelPtr(this);
}
- Jump branchPtrWithPatch(Condition cond, RegisterID left, DataLabelPtr& dataLabel, TrustedImmPtr initialRightValue = TrustedImmPtr(0))
+ Jump branchPtrWithPatch(RelationalCondition cond, RegisterID left, DataLabelPtr& dataLabel, TrustedImmPtr initialRightValue = TrustedImmPtr(0))
{
dataLabel = moveWithPatch(initialRightValue, scratchRegister);
return branchPtr(cond, left, scratchRegister);
}
- Jump branchPtrWithPatch(Condition cond, Address left, DataLabelPtr& dataLabel, TrustedImmPtr initialRightValue = TrustedImmPtr(0))
+ Jump branchPtrWithPatch(RelationalCondition cond, Address left, DataLabelPtr& dataLabel, TrustedImmPtr initialRightValue = TrustedImmPtr(0))
{
dataLabel = moveWithPatch(initialRightValue, scratchRegister);
return branchPtr(cond, left, scratchRegister);
@@ -441,7 +439,7 @@
}
using MacroAssemblerX86Common::branchTest8;
- Jump branchTest8(Condition cond, ExtendedAddress address, TrustedImm32 mask = TrustedImm32(-1))
+ Jump branchTest8(ResultCondition cond, ExtendedAddress address, TrustedImm32 mask = TrustedImm32(-1))
{
TrustedImmPtr addr(reinterpret_cast<void*>(address.offset));
MacroAssemblerX86Common::move(addr, scratchRegister);
