commit 0192e2c4abf94913e0a19f33cc4a6cf0add4c7dc
author barraclough@apple.com <barraclough@apple.com@268f45cc-cd09-0410-ab3c-d52691b4dbfc> Thu Aug 06 05:22:42 2009 +0000
committer barraclough@apple.com <barraclough@apple.com@268f45cc-cd09-0410-ab3c-d52691b4dbfc> Thu Aug 06 05:22:42 2009 +0000
tree dfdef559d8e60b9713b73c72efd71cf86bef00c7
parent 515c284335367a97d1e0796b7395e6c92eeaea89

2009-08-05  Zoltan Herczeg  <zherczeg@inf.u-szeged.hu>

        Reviewed by Gavin Barraclough.

        Add JIT support for generic ARM port without optimizations.
        https://bugs.webkit.org/show_bug.cgi?id=24986

        All JIT optimizations are disabled.

        Signed off by Zoltan Herczeg <zherczeg@inf.u-szeged.hu>
        Signed off by Gabor Loki <loki@inf.u-szeged.hu>

        * assembler/ARMAssembler.cpp:
        (JSC::ARMAssembler::baseIndexTransfer32):
        * assembler/AbstractMacroAssembler.h:
        (JSC::AbstractMacroAssembler::Imm32::Imm32):
        * assembler/MacroAssemblerARM.h:
        (JSC::MacroAssemblerARM::store32):
        (JSC::MacroAssemblerARM::move):
        (JSC::MacroAssemblerARM::branch32):
        (JSC::MacroAssemblerARM::add32):
        (JSC::MacroAssemblerARM::sub32):
        (JSC::MacroAssemblerARM::load32):
        * bytecode/CodeBlock.h:
        (JSC::CodeBlock::getBytecodeIndex):
        * jit/JIT.h:
        * jit/JITInlineMethods.h:
        (JSC::JIT::restoreArgumentReference):
        * jit/JITOpcodes.cpp:
        * jit/JITStubs.cpp:
        * jit/JITStubs.h:
        (JSC::JITStackFrame::returnAddressSlot):
        * wtf/Platform.h:



git-svn-id: http://svn.webkit.org/repository/webkit/trunk@46831 268f45cc-cd09-0410-ab3c-d52691b4dbfc

JavaScriptCore/assembler/MacroAssemblerARM.h

diff --git a/JavaScriptCore/assembler/MacroAssemblerARM.h b/JavaScriptCore/assembler/MacroAssemblerARM.h
index 27879a9..084e5e5 100644
--- a/JavaScriptCore/assembler/MacroAssemblerARM.h
+++ b/JavaScriptCore/assembler/MacroAssemblerARM.h
@@ -243,20 +243,26 @@
 
     void store32(Imm32 imm, ImplicitAddress address)
     {
-        move(imm, ARM::S1);
+        if (imm.m_isPointer)
+            m_assembler.ldr_un_imm(ARM::S1, imm.m_value);
+        else
+            move(imm, ARM::S1);
         store32(ARM::S1, address);
     }
 
     void store32(RegisterID src, void* address)
     {
-        m_assembler.moveImm(reinterpret_cast<ARMWord>(address), ARM::S0);
+        m_assembler.ldr_un_imm(ARM::S0, reinterpret_cast<ARMWord>(address));
         m_assembler.dtr_u(false, src, ARM::S0, 0);
     }
 
     void store32(Imm32 imm, void* address)
     {
-        m_assembler.moveImm(reinterpret_cast<ARMWord>(address), ARM::S0);
-        m_assembler.moveImm(imm.m_value, ARM::S1);
+        m_assembler.ldr_un_imm(ARM::S0, reinterpret_cast<ARMWord>(address));
+        if (imm.m_isPointer)
+            m_assembler.ldr_un_imm(ARM::S1, imm.m_value);
+        else
+            m_assembler.moveImm(imm.m_value, ARM::S1);
         m_assembler.dtr_u(false, ARM::S1, ARM::S0, 0);
     }
 
@@ -284,7 +290,10 @@
 
     void move(Imm32 imm, RegisterID dest)
     {
-        m_assembler.moveImm(imm.m_value, dest);
+        if (imm.m_isPointer)
+            m_assembler.ldr_un_imm(dest, imm.m_value);
+        else
+            m_assembler.moveImm(imm.m_value, dest);
     }
 
     void move(RegisterID src, RegisterID dest)
@@ -294,7 +303,7 @@
 
     void move(ImmPtr imm, RegisterID dest)
     {
-        m_assembler.mov_r(dest, m_assembler.getImm(reinterpret_cast<ARMWord>(imm.m_value), ARM::S0));
+        move(Imm32(imm), dest);
     }
 
     void swap(RegisterID reg1, RegisterID reg2)
@@ -324,7 +333,11 @@
 
     Jump branch32(Condition cond, RegisterID left, Imm32 right)
     {
-        m_assembler.cmp_r(left, m_assembler.getImm(right.m_value, ARM::S0));
+        if (right.m_isPointer) {
+            m_assembler.ldr_un_imm(ARM::S0, right.m_value);
+            m_assembler.cmp_r(left, ARM::S0);
+        } else
+            m_assembler.cmp_r(left, m_assembler.getImm(right.m_value, ARM::S0));
         return Jump(m_assembler.jmp(ARMCondition(cond)));
     }
 
@@ -538,25 +551,25 @@
 
     void add32(Imm32 imm, AbsoluteAddress address)
     {
-        m_assembler.moveImm(reinterpret_cast<ARMWord>(address.m_ptr), ARM::S1);
+        m_assembler.ldr_un_imm(ARM::S1, reinterpret_cast<ARMWord>(address.m_ptr));
         m_assembler.dtr_u(true, ARM::S1, ARM::S1, 0);
         add32(imm, ARM::S1);
-        m_assembler.moveImm(reinterpret_cast<ARMWord>(address.m_ptr), ARM::S0);
+        m_assembler.ldr_un_imm(ARM::S0, reinterpret_cast<ARMWord>(address.m_ptr));
         m_assembler.dtr_u(false, ARM::S1, ARM::S0, 0);
     }
 
     void sub32(Imm32 imm, AbsoluteAddress address)
     {
-        m_assembler.moveImm(reinterpret_cast<ARMWord>(address.m_ptr), ARM::S1);
+        m_assembler.ldr_un_imm(ARM::S1, reinterpret_cast<ARMWord>(address.m_ptr));
         m_assembler.dtr_u(true, ARM::S1, ARM::S1, 0);
         sub32(imm, ARM::S1);
-        m_assembler.moveImm(reinterpret_cast<ARMWord>(address.m_ptr), ARM::S0);
+        m_assembler.ldr_un_imm(ARM::S0, reinterpret_cast<ARMWord>(address.m_ptr));
         m_assembler.dtr_u(false, ARM::S1, ARM::S0, 0);
     }
 
     void load32(void* address, RegisterID dest)
     {
-        m_assembler.moveImm(reinterpret_cast<ARMWord>(address), ARM::S0);
+        m_assembler.ldr_un_imm(ARM::S0, reinterpret_cast<ARMWord>(address));
         m_assembler.dtr_u(true, dest, ARM::S0, 0);
     }